CS4210 Datasheet, PDF (96/102 Pages) National Semiconductor (TI) – IEEE 1394 OHCI Controller

Register Descriptions (Continued)
4.5.11 nscBusmgrID
The nscBusmgrID register (Table 4-68) is a directly read-
able BUS_MANAGER_ID CSR resource.
4.5.12 nscBandwAvail
The nscBandwAvail register (Table 4-69) is a directly read-
able BANDWIDTH_AVAILABLE CSR resource.
4.5.13 nscChanAvailHi
The nscChanAvailHi register (Table 4-70) is a directly read-
able CHANNELS_AVAILALBLE_HI CSR resource.
4.5.14 nscChanAvailLo
The nscChanAvailLo register (Table 4-71) is a directly read-
able CHANNELS_AVAILABLE_LO CSR resource.
Table 4-68. BAR1+Offset 60h: nscBusmgrID Register
Bit
31:0
Name
busmgrID
Access
R
Reset
Undef
Description
Bus Manager ID: BUS_MANAGER_ID CSR resource.
Table 4-69. BAR1+Offset 64h: nscBandwAvail Register
Bit
31:0
Name
bandwAvail
Access
R
Reset
Undef
Description
Bandwidth Available: BANDWIDTH_AVAILABLE CSR resource.
Table 4-70. BAR1+Offset 68h: nscChanAvailHi Register
Bit
Name
Access Reset Description
31:0
chanAvailHi
R
Undef Channels Available High: CHANNELS_AVAILALBLE_HI CSR resource.
Table 4-71. BAR1+Offset 6Ch: nscChanAvailLo Register
Bits
Field Name
Access Reset Description
31:0
chanAvailLo
R
Undef Channels Available Low: CHANNELS_AVAILALBLE_LO CSR resource.
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