CS4210 Datasheet, PDF (8/102 Pages) National Semiconductor (TI) – IEEE 1394 OHCI Controller

2.0 Signal Definitions
This section defines the signals and external interface of
the CS4210. Figure 2-1 shows the pins organized by their
functional groupings (internal test and electrical pins are
not shown).
2.1 PIN ASSIGNMENT
The tables in this section use several common abbrevia-
tions. Table 2-1 lists the mnemonics and their meanings.
Figure 2-2 on page 9 shows the pin assignment for the
CS4210 with Tables 2-2 and 2-3, on pages 10 and 11, list-
ing the pin assignments sorted by pin number and alpha-
betically by signal name.
Section 2.2 "Signal Descriptions" starting on page 12 pro-
vides a description for each signal within its associated
functional group.
Table 2-1. Pin Type Definitions
Mnemonic
Definition
I
I/O
O
t/s
VDD
VDDIO
VSS
Input Pin
Bidirectional Pin
Output
TRI-STATE Signal
2.5V Core Power Supply
3.3V I/O Power Supply
Ground Connection
PCI Bus
Interface
AD[31:0]
C/BE[3:0]#
FRAME#
IRDY#
TRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
PAR
PREQ#
PGNT#
INTA#
RST#
PCLK
PME#
Geode™
CS4210
Figure 2-1. Signal Groups
DATA[0:7]
CTRL[0:1]
LREQ
SCLK
LPS
LNKON
DIRECT
EECLK
EEDATA
CCLKO
CCLKI
CMC
CMCL
PHY-Link
Interface
I²C
Interface
8 kHz Reference
Clock Interface
Contender
Master Control
Interface
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