CS4210 Datasheet, PDF (14/102 Pages) National Semiconductor (TI) – IEEE 1394 OHCI Controller

Signal Definitions (Continued)
2.2.3 Miscellaneous Interface Signals
Signal Name
Pin No.
Type Description
EECLK
EEDATA
CCLKO
CCLKI
CMC
CMCL
TESTO
TESTEN#
4
O
Serial EEPROM Clock
The I²C bus clock signal.
5
I
Serial EEPROM Data
The I²C data signal.
77
O
Cycle Clock Output
The 8 kHz reference clock output.
78
I
Cycle Clock Input
The 8 kHz reference clock input.
2
O
Contender Master Control
This output is set via the nscCMCControl.CMC bit (BAR1+Offset 18h[0]).
The value placed on the bit is directly reflected on this pin.
3
O
Contender Master Control Link Enabled
This output is set via the nscCMCControl.CMCL bit (BAR1+Offset 18h[1]).
The value of the bit is reflected on the output when HCControl.linkEnable
(BAR0+Offset 50h[17]) is set. Otherwise it is 0.
7
O
Test Out
National internal test pin, user must float.
76
I
Test Enable
National internal test pin, user must tie high.
2.2.4 Power Supplies and Ground Connections
Signal Name
Pin No.
Type Description
VDD
VDDIO
VSS
9, 13, 20, 35, 46, 55,
70, 80, 91, 96
6, 16, 39, 63, 87
1, 11, 24, 30, 42, 50,
60, 75, 83, 94, 100
PWR 2.5V Core Power Supply Connections (Total of 10)
PWR
GND
3.3V I/O Power Supply Connections (Total of 5)
Ground Connections (Total of 11)
www.national.com
14
Revision 1.0