CS4210 Datasheet, PDF (27/102 Pages) National Semiconductor (TI) – IEEE 1394 OHCI Controller

Operational Description (Continued)
3.6.2 Posted Writes
For write requests handled by the Physical Request con-
troller, the CS4210 may send an ack_complete before the
data is actually written to system memory. These writes are
referred to as posted writes since posted writes impact the
Physical Request controller and the Asynchronous Receive
Request DMA context. Further information about posted
writes is located in Section 3.5.3 "Posted Writes" on page
24. Information on host bus error handling of posted writes
is provided in Section 3.7.7 "Posted Write Error" on page
29.”
3.6.3 Physical Responses
The response packet generated for a physical read, non-
posted write, and lock request contains the transaction
label as it appeared in the request, the destination_ID as
provided in the request’s source_ID, and are transmitted at
the speed at which the request was received. The source
bus ID in the response packet is equal to the destination
bus ID from the original request. Note that this is not neces-
sarily the same as the contents of the busNumber field in
the Node ID register (BAR0+Offset E8h[15:6]). Unlike AR
Response packets, physical responses do not track a
SPLIT_TIMEOUT expiration time.
3.6.4 Physical Response Retries
There is a separate nibble-wide MaxPhysRespRetries field
in the ATRetries Register (BAR0+Offset 08h[15:11]) that
tells the Physical Response Unit how many times to
attempt to retry the transmit operation for the response
packet when an ack_busy* or ack_data_error is received
from the target node. If the retry count expires, the packet
is dropped and software is not notified. Refer to Section
4.4.3 "ATRetries Register" on page 59 for register details.
3.6.5 Interrupt Considerations for Physical Requests
Physical read request handling does not cause an interrupt
to be generated under any circumstances. Physical write
requests generate an interrupt when posted write process-
ing yields an error. Lock requests to the serial bus registers
generate an interrupt when the CS4210 is unable to deliver
a lock response packet.
3.6.6 Bus Reset
On a bus reset, all pending physical requests (those for
which ack_pending was sent) are discarded. Following a
bus reset, only physical requests to the autonomous CSR
resources (see Section 4.4.4 "Autonomous CSR
Resources" on page 60) can be handled immediately.
Other physical requests are processed after software ini-
tializes the filter registers (see Section 4.4.22 "Asynchro-
nous Request Filter Registers" on page 78 and Section
4.4.23 "Physical Request Filter Registers" on page 79).
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