CS4210 Datasheet, PDF (95/102 Pages) National Semiconductor (TI) – IEEE 1394 OHCI Controller

Register Descriptions (Continued)
4.5.8 nscPhysReadCount
The nscPhysReadCount register (Table 4-65) provides sta-
tistics on physical read requests and CSR read requests.
This register is cleared when a 1 is written to D0.
4.5.9 nscPhysWriteCount
The nscPhysWriteCount register (Table 4-66) provides sta-
tistics on physical write requests. This register is cleared
when a 1 is written to D0.
4.5.10 nscPhysLockCount
The nscPhysLockCount register (Table 4-67) provides sta-
tistics on physical lock requests. This register is cleared
when a 1 is written to D0.
Bit
31:16
15:0
Table 4-65. BAR1+Offset 40h: nscPhysReadCount
Name
RSVD
physReadCount
Access
--
RW
Reset
0
0000h
Description
Reserved
Physical Read Count: Current count of physical read requests and/or CSR
read requests.
Bit
31:16
15:0
Table 4-66. BAR1+Offset 44h: nscPhysWriteCount Register
Name
Access Reset Description
RSVD
physWriteCount
--
0
Reserved
RW
0000h Physical Write Count: Current count of physical write requests.
Bit
31:16
15:0
Table 4-67. BAR1+Offset 48h: nscPhysLockCount Register
Name
Access Reset Description
RSVD
physLockCount
--
0
Reserved
RW
0000h Physical Lock Count: Current count of physical lock requests.
Revision 1.0
95
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