CS4210 Datasheet, PDF (93/102 Pages) National Semiconductor (TI) – IEEE 1394 OHCI Controller

Register Descriptions (Continued)
4.5.2 nscEventSet/Clear
The nscEvent register (Table 4-59) contains events that are
unique to the CS4210. This register is set (BAR1+Offset
04h) and clear (BAR1+Offset 08h).
4.5.3 nscMaskSet/Clear
The nscEventMask register (Table 4-60) controls the
masking of the nscEvent register. This register is set
(BAR1+Offset 0Ch) and clear (BAR1+Offset 10h).
Table 4-59. BAR1+Offset 04h (Set) and 08h (Clear): nscEvent Register
Bit
31:5
4
3
2
1
0
Name
RSVD
eepromAckErr
eepromCRCErr
physLockToggle
disableCmDetect
noCycleMaster
Access
--
RSCU
RSCU
RSCU
RSCU
RSCU
Reset
0
Undef
Undef
Undef
Undef
Undef
Description
Reserved
EEPROM Acknowledge Error: Set when an acknowledge is missing from
the serial EEPROM load.
EEPROM Cyclical Redundancy Check Error: Set when a CRC error
occurs as a result of the serial EEPROM load.
Physical Lock Toggle: Set when D15 of the nscPhysLockCount register
(BAR1+Offset 48h) changes.
Disable Cycle Master Detector: Set when D15 of the nscPhysWriteCount
register (BAR1+Offset 44h) changes.
No Cycle Master: Set when D15 of the nscPhysReadCount register
(BAR1+Offset 40h) changes.
Table 4-60. BAR1+Offset 0Ch (Set) and 10h (Clear): nscEventMask Register
Bit
Name
Access
31:5
RSVD
4
eepromAckErrMask
--
RSCU
3
eepromCRCErrMask
RSC
2
physLockToggleMask
RSC
1 disableCmDetectMask RSC
0
noCycleMasterMask
RSC
Reset
0
Undef
Undef
Undef
Undef
Undef
Description
Reserved
EEPROM Acknowledge Error Mask: Set to 1 enables the corresponding bit
in the nscEvent register (BAR1+Offset 04h).
EEPROM Cyclical Redundancy Check Error Mask: Set to 1 enables the
corresponding bit in the nscEvent register (BAR1+Offset 04h).
Physical Lock Toggle Mask: Set to 1 enables the corresponding bit in the
nscEvent register (BAR1+Offset 04h).
Disable Cycle Master Detector Mask: Set to 1 enables the corresponding
bit in the nscEvent register (BAR1+Offset 04h).
No Cycle Master Mask: Set to 1 enables the corresponding bit in the
nscEvent register (BAR1+Offset 04h).
Revision 1.0
93
www.national.com