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CS4210 Datasheet, PDF (101/102 Pages) National Semiconductor (TI) – IEEE 1394 OHCI Controller
Electrical Specifications (Continued)
5.5 AC SPECIFICATIONS
Symbol
tVAL
tON
tOFF
tSU
tH
tRST
tRST-CLK
tRST-OFF
tCYC
tHIGH
tLOW
Parameter
Table 5-7. PCI Timings: CLOAD = 50 pF
Min
Max
CLK to Signal Valid Delay - bused signals
2
11
Float to Active Delay
2
Active to Float Delay
28
Input Setup Time to CLK - bused signals
7
Input Hold Time from CLK
0
Reset Active Time after Power Stable
1
Reset Active Time after CLK Stable
100
Reset Active Time to Output TRI-STATE Delay
40
PCLK Cycle Time
30
PCLK High Time
11
PCLK Low Time
11
PCLK
PCI
Output
TRI-STATE
Output
PCLK
PCI
Output
tVAL
tON
tOFF
Figure 5-2. PCI Timing Waveform
tH
tSU
Figure 5-3. PCI Setup and Hold Timing
Units
ns
ns
ns
ns
ns
ms
ms
ns
ns
ns
ns
Revision 1.0
101
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