MC68HC908BD48 Datasheet, PDF (61/290 Pages) Freescale Semiconductor, Inc – Microcontrollers

FLASH Memory
FLASH Block Protection
4.8 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made for protecting
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by use of a FLASH Block
Protect Register (FLBPR). The FLBPR determines the range of the
FLASH memory which is to be protected. The range of the protected
area starts from a location defined by FLBPR and ends at the bottom of
the FLASH memory ($FFFF). When the memory is protected, the HVEN
bit cannot be set in either ERASE or PROGRAM operations.
4.9 FLASH Block Protect Register (FLBPR)
The FLASH block protect register is implemented as an 7-bit I/O register.
The BPR bit content of the register determines the starting location of the
protected range within the FLASH memory.
Address: $FE08
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
BPR7 BPR6 BPR5 BPR4 BPR3 BPR2 BPR1
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 4-3. FLASH Block Protect Register (FLBPR)
BPR[7:1] — FLASH Block Protect Bits
These seven bits represent bits [15:9] of a 16-bit memory address.
Bits [8:0] are logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory, at $FFFF.
MC68HC908BD48 — Rev. 1.0
MOTOROLA
FLASH Memory
Technical Data
61