MC68HC908BD48 Datasheet, PDF (49/290 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory Map
Input/Output (I/O) Section
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
$FE03
SIM Break Flag Control
Register (SBFCR)
Write:
BCFE
R
R
R
R
R
R
R
Reset: 0
Read: IF6
IF5
IF4
IF3
IF2
IF1
0
0
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
Read: 0
0
0
0
IF10
IF9
IF8
IF7
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
$FE06
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
0
0
Read: 0
0
0
0
$FE07
FLASH Control Register
(FLCR)
Write:
HVEN MASS ERASE PGM
Reset: 0
0
0
0
0
0
0
0
Read:
0
$FE08
FLASH Block Protect
Register (FLBPR)
Write:
BPR7
BPR6
BPR5
BPR4
BPR3
BPR2
BPR1
Reset: 0
0
0
0
0
0
0
0
$FE09
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
0
0
$FE0A
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
0
0
$FE0B
Read:
R
R
R
R
R
R
R
R
Reserved Write:
Reset: 0
0
0
0
0
0
0
0
Read:
$FE0C
Break Address High
Register (BRKH)
Write:
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 11 of 12)
MC68HC908BD48 — Rev. 1.0
MOTOROLA
Memory Map
Technical Data
49