MC68HC908BD48 Datasheet, PDF (168/290 Pages) Freescale Semiconductor, Inc – Microcontrollers

Universal Serial Bus Module (USB)
TBIE — Transmit Buffer Interrupt Enable
When this bit is set, the TBEF flag is enabled to generate an interrupt
request to the CPU. When TBIE is cleared, the TBEF flag is prevented
from generating an interrupt request to the CPU. Reset clears this bit.
1 = TBEF bit set will generate interrupt request to CPU
0 = TBEF bit set does not generate interrupt request to CPU
RBIE — Receive Buffer Interrupt Enable
When this bit is set, the RBFF flag is enabled to generate an interrupt
request to the CPU. When RBIE is cleared, the RBFF flag is
prevented from generating an interrupt request to the CPU. Reset
clears this bit.
1 = RBFF bit set will generate interrupt request to CPU
0 = RBFF bit set does not generate interrupt request to CPU
EOPIE — End Of Packet Interrupt Enable
When this bit is set, the EOPIF flag is enabled to generate an interrupt
request to the CPU. When EOPIE is cleared, the EOPIF flag is
prevented from generating an interrupt request to the CPU. Reset
clears this bit.
1 = EOPIF bit set will generate interrupt request to CPU
0 = EOPIF bit set does not generate interrupt request to CPU
RSTIE — Reset Interrupt Enable
When this bit is set, the RSTIF flag is enabled to generate an interrupt
request to the CPU. When RSTIE is cleared, the RSTIF flag is
prevented from generating an interrupt request to the CPU. Reset
clears this bit.
1 = RSTIF bit set will generate interrupt request to CPU
0 = RSTIF bit set does not generate interrupt request to CPU
NOTE:
Since there are more than one interrupt flags in the register, it is possible
that program use Read-Modify-Write instruction to clear one flag, will
occasionally clear the other flags which was just set after Read cycle of
Read-Modify-Write operation.
Technical Data
168
Universal Serial Bus Module (USB)
MC68HC908BD48 — Rev. 1.0
MOTOROLA