MC68HC908BD48 Datasheet, PDF (195/290 Pages) Freescale Semiconductor, Inc – Microcontrollers

DDC12AB Interface
I/O Pins
Table 15-2. DDC I/O Register Summary
Addr. Register Name
Bit 7
6
5
Read:
DDC Master Control
ALIF NAKIF BB
$0016
Register Write:
(DMCR)
Reset: 0
0
0
$0017
Read:
DDC Address Register
(DADR)
Write:
Reset:
DAD7
1
DAD6
0
DAD5
1
$0018
Read:
0
DDC
DEN DIEN
Control Register Write:
(DCR)
Reset: 0
0
0
$0019
Read: RXIF
DDC
Status Register Write: 0
(DSR)
Reset: 0
TXIF MATCH
0
0
0
$001A
Read:
DDC
Data Transmit Register Write:
(DDTR)
Reset:
DTD7
1
DTD6
1
DTD5
1
$001B
DDC ^Read:
Data Receive Register
(DDRR)
Write:
Reset:
DRD7
0
DRD6
0
DRD5
0
Read:
$001C
DDC2 Address Register
(D2ADR)
Write:
Reset:
D2AD7
0
D2AD6
0
D2AD5
0
= Unimplemented
4
MAST
0
DAD4
0
0
0
SRW
0
DTD4
1
DRD4
0
D2AD4
0
3
MRW
0
DAD3
0
TXAK
0
RXAK
1
DTD3
1
DRD3
0
D2AD3
0
2
1
Bit 0
BR2
BR1
BR0
0
0
0
DAD2 DAD1 EXTAD
0
0
0
0
SCLIEN DDC1EN
0
SCLIF
0
0
0
TXBE
1
0
RXBF
0
DTD2 DTD1 DTD0
1
DRD2
1
DRD1
1
DRD0
0
0
0
0
D2AD2 D2AD1
0
0
0
MC68HC908BD48 — Rev. 1.0
MOTOROLA
DDC12AB Interface
Technical Data
195