MC68HC908BD48 Datasheet, PDF (230/290 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
Table 17-1. I/O Port Register Summary
Addr.
Register Name
Bit 7
6
5
$0000
Read:
Port A Data Register
(PTA)
Write:
Reset:
PTA7
PTA6
PTA5
$0001
Read:
Port B Data Register
(PTB)
Write:
Reset:
PTB7
PTB6
PTB5
$0002
Read: 0
Port C Data Register
(PTC)
Write:
Reset:
0
PTC5
$0003
Read: 0
Port D Data Register
(PTD)
Write:
Reset:
PTD6 PTD5
Read:
$0004
Data Direction Register A
(DDRA)
Write:
Reset:
DDRA7
0
DDRA6
0
DDRA5
0
Read:
$0005
Data Direction Register B
(DDRB)
Write:
Reset:
DDRB7
0
DDRB6
0
DDRB5
0
Read: 0
$0006
Data Direction Register C
(DDRC)
Write:
Reset: 0
0
DDRC5
0
0
= Unimplemented
4
3
PTA4 PTA3
Unaffected by reset
PTB4 PTB3
Unaffected by reset
PTC4 PTC3
Unaffected by reset
PTD4 PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
DDRB4 DDRB3
0
0
DDRC4 DDRC3
0
0
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
DDRB2
0
DDRC2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
DDRB1
0
DDRC1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
DDRB0
0
DDRC0
0
Technical Data
230
Input/Output (I/O) Ports
MC68HC908BD48 — Rev. 1.0
MOTOROLA