PIC24FJ128GA310-I Datasheet, PDF (91/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
REGISTER 7-1: RCON: RESET CONTROL REGISTER (CONTINUED)
bit 5
SWDTEN: Software Enable/Disable of WDT bit⁽⁴⁾
1 = WDT is enabled
0 = WDT is disabled
bit 4
WDTO: Watchdog Timer Time-out Flag bit⁽¹⁾
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
bit 3
SLEEP: Wake From Sleep Flag bit⁽¹⁾
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
bit 2
IDLE: Wake-up From Idle Flag bit⁽¹⁾
1 = Device has been in Idle mode
0 = Device has not been in Idle mode
bit 1
BOR: Brown-out Reset Flag bit⁽¹⁾
1 = A Brown-out Reset has occurred (also set after a Power-on Reset).
0 = A Brown-out Reset has not occurred
bit 0
POR: Power-on Reset Flag bit⁽¹⁾
1 = A Power-on Reset has occurred
0 = A Power-on Reset has not occurred
Note 1:
2:
3:
4:
All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the LPCFG Configuration bit is 1’ (unprogrammed), the retention regulator is disabled and the RETEN bit
has no effect.
Re-enabling the regulator after it enters Standby mode will add a delay, TVREG, when waking up from
Sleep. Applications that do not use the voltage regulator should set this bit to prevent this delay from
occurring.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
 2010-2011 Microchip Technology Inc.
DS39996F-page 91