PIC24FJ128GA310-I Datasheet, PDF (257/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
REGISTER 20-3: PMCON3: EPMP CONTROL REGISTER 3
R/W-0
R/W-0
R/W-0
R/W-0
U-0
PTWREN PTRDEN PTBE1EN PTBE0EN
—
bit 15
R/W-0
AWAITM1
R/W-0
AWAITM0
R/W-0
AWAITE
bit 8
U-0
—
bit 7
R/W-0
PTEN22⁽¹⁾
R/W-0
PTEN21⁽¹⁾
R/W-0
PTEN20⁽¹⁾
R/W-0
PTEN19⁽¹⁾
R/W-0
PTEN18⁽¹⁾
R/W-0
PTEN17⁽¹⁾
R/W-0
PTEN16⁽¹⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-9
bit bit 8
bit 7
bit 6-0
PTWREN: Write/Enable Strobe Port Enable bit
1 = PMWR/PMENB port is enabled
0 = PMWR/PMENB port is disabled
PTRDEN: Read/Write Strobe Port Enable bit
1 = PMRD/PMWR port is enabled
0 = PMRD/PMWR port is disabled
PTBE1EN: High Nibble/Byte Enable Port Enable bit
1 = PMBE1 port is enabled
0 = PMBE1 port is disabled
PTBE0EN: Low Nibble/Byte Enable Port Enable bit
1 = PMBE0 port is enabled
0 = PMBE0 port is disabled
Unimplemented: Read as ‘0’
AWAITM<1:0>: Address Latch Strobe Wait States bits
11 = Wait of 3½ TCY
10 = Wait of 2½ TCY
01 = Wait of 1½ TCY
00 = Wait of ½ TCY
AWAITE: Address Hold After Address Latch Strobe Wait States bits
1 = Wait of 1¼ TCY
0 = Wait of ¼ TCY
Unimplemented: Read as ‘0’
PTEN<22:16>: EPMP Address Port Enable bits⁽¹⁾
1 = PMA<22:16> function as EPMP address lines
0 = PMA<22:16> function as port I/Os
Note 1: These bits are not available in 80 and 64-pin devices (PIC24FJXXXGA306, PIC24FJXXXGA308).
 2010-2011 Microchip Technology Inc.
DS39996F-page 257