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| PIC24FJ128GA310-I Datasheet, PDF (201/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology | |||
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PIC24FJ128GA310 FAMILY
FIGURE 13-2:
TIMER2 AND TIMER4 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM
T2CK
(T4CK)
Gate
Sync
TON
1x
01
TCKPS<1:0>
2
Prescaler
1, 8, 64, 256
TGATE
1
Set T2IF (T4IF)
0
TCY
QD
Q CK
Reset
TMR2 (TMR4)
00
TCS(1)
TGATE(1)
Sync
Equal
Comparator
PR2 (PR4)
Note 1: The timer clock input must be assigned to an available RPn/RPIn pin before use. See Section 11.4 âPeripheral
Pin Select (PPS)â for more information.
FIGURE 13-3:
TIMER3 AND TIMER5 (16-BIT ASYNCHRONOUS) BLOCK DIAGRAM
T3CK
(T5CK)
Sync
TON
1x
01
TCKPS<1:0>
2
Prescaler
1, 8, 64, 256
TGATE
1
Set T3IF (T5IF)
0
TCY
QD
Q CK
Reset
TMR3 (TMR5)
A/D Event Trigger(2)
Equal
Comparator
00
TCS(1)
TGATE(1)
PR3 (PR5)
Note 1:
2:
The timer clock input must be assigned to an available RPn/RPIn pin before use. See Section 11.4 âPeripheral
Pin Select (PPS)â for more information.
The A/D event trigger is available only on Timer3.
ï£ 2010-2011 Microchip Technology Inc.
DS39996F-page 201
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