PIC24FJ128GA310-I Datasheet, PDF (39/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
REGISTER 3-2: CORCON: CPU CORE CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
U-0
U-0
R/C-0
R-1
U-0
U-0
—
—
—
—
IPL3⁽¹⁾
r
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
r = Reserved bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-4
bit 3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
IPL3: CPU Interrupt Priority Level Status bit⁽¹⁾
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
Reserved: Read as ‘1’
Unimplemented: Read as ‘0’
Note 1: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level; see
Register 3-1 for bit description.
 2010-2011 Microchip Technology Inc.
DS39996F-page 39