PIC24FJ128GA310-I Datasheet, PDF (168/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
11.1.1 I/O PORT WRITE/READ TIMING
One instruction cycle is required between a port direction
change or port write operation and a read operation of
the same port. Typically, this instruction would be a NOP.
11.1.2 OPEN-DRAIN CONFIGURATION
In addition to the PORT, LAT and TRIS registers for data
control, each port pin can also be individually configured
for either a digital or open-drain output. This is controlled
by the Open-Drain Control register, ODCx, associated
with each port. Setting any of the bits configures the
corresponding pin to act as an open-drain output.
The open-drain feature allows the generation of
outputs higher than VDD (e.g., 5V) on any desired
digital only pins by using external pull-up resistors. The
maximum open-drain voltage allowed is the same as
the maximum VIH specification.
11.2 Configuring Analog Port Pins
(ANSx)
The ANSx and TRISx registers control the operation of
the pins with analog function. Each port pin with analog
function is associated with one of the ANS bits (see
Register 11-1 through Register 11-6), which decides if
the pin function should be analog or digital. Refer to
Table 11-1 for detailed behavior of the pin for different
ANSx and TRISx bit settings.
When reading the PORT register, all pins configured as
analog input channels will read as cleared (a low level).
11.2.1
ANALOG INPUT PINS AND
VOLTAGE CONSIDERATIONS
The voltage tolerance of pins used as device inputs is
dependent on the pin’s input function. Most input pins are
able to handle DC voltages of up to 5.5V, a level typical
for digital logic circuits. However, several pins can only
tolerate voltages up to VDD. Voltage excursions beyond
VDD on these pins should always be avoided.
Table 11-2 summarizes the different voltage tolerances.
Refer to Section 32.0 “Electrical Characteristics” for
more details.
TABLE 11-1: CONFIGURING ANALOG/DIGITAL FUNCTION OF AN I/O PIN
Pin Function
ANSx Setting
TRISx Setting
Comments
Analog Input
1
Analog Output
1
Digital Input
0
Digital Output
0
1
It is recommended to keep ANSx = 1.
1
It is recommended to keep ANSx = 1.
1
Firmware must wait at least one instruction cycle
after configuring a pin as a digital input before a valid
input value can be read.
0
Make sure to disable the analog output function on
the pin if any is present.
TABLE 11-2: INPUT VOLTAGE LEVELS FOR PORT OR PIN TOLERATED DESCRIPTION INPUT
Port or Pin
Tolerated Input
Description
PORTA<15:14, 7:0>⁽¹⁾
PORTB<15:7, 5:2>
PORTC<3:1>⁽¹⁾
PORTD<15:8, 5:0>⁽¹⁾
PORTE<9:8, 4:0>⁽¹⁾
5.5V
Tolerates input levels above VDD; useful
for most standard logic.
PORTF<13:12, 8:0>⁽¹⁾
PORTG<15:12, 9, 6:0>⁽¹⁾
PORTA<10:9>⁽¹⁾
PORTB<6, 1:0>
PORTC<15:12, 4>⁽¹⁾
PORTD<7:6>
VDD
Only VDD input levels are tolerated.
PORTE<7:5>⁽¹⁾
PORTG<8:7>
Note 1: Not all of these pins are implemented in 64-pin or 80-pin devices. Refer to Section 1.0 “Device Overview”
for a complete description of port pin implementation.
DS39996F-page 168
 2010-2011 Microchip Technology Inc.