PIC24FJ128GA310-I Datasheet, PDF (307/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
REGISTER 24-6: AD1CHS: A/D SAMPLE SELECT REGISTER (CONTINUED)
bit 7-5
bit 4-0
CH0NA<2:0>: Sample A Channel 0 Negative Input Select bits
Same definitions as for CHONB<2:0>.
CH0SA<4:0>: Sample A Channel 0 Positive Input Select bits
Same definitions as for CHOSB<4:0>.
Note 1: These input channels do not have corresponding memory mapped result buffers.
2: These channels are implemented in 100-pin devices only.
REGISTER 24-7: ANCFG: A/D BAND GAP REFERENCE CONFIGURATION
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
—
—
—
—
—
VBG6EN VBG2EN
VBGEN
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
VBG6EN: A/D Input VBG/6 Enable bit
1 = Band gap voltage, divided by six reference (VBG/6), is enabled
0 = Band gap, divided by six reference (VBG/6), is disabled
VBG2EN: A/D Input VBG/6 Enable bit
1 = Band gap voltage, divided by two reference (VBG/6), is enabled
0 = Band gap, divided by two reference (VBG/6), is disabled
VBGEN: A/D Input VBG/6 Enable bit
1 = Band gap voltage reference (VBG/6) is enabled
0 = Band gap reference (VBG/6) is disabled
 2010-2011 Microchip Technology Inc.
DS39996F-page 307