PIC24FJ128GA310-I Datasheet, PDF (65/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
4.2.5 EXTENDED DATA SPACE (EDS)
The Extended Data Space (EDS) allows PIC24F
devices to address a much larger range of data than
would otherwise be possible with a 16-bit address
range. EDS includes any additional internal data mem-
ory not directly accessible by the lower 32-Kbyte data
address space, and any external memory through
EPMP.
In addition, EDS also allows read access to the
program memory space. This feature is called Program
Space Visibility (PSV), and is discussed in detail in
Section 4.3.3 “Reading Data from Program Memory
Using EDS”.
Figure 4-4 displays the entire EDS space. The EDS is
organized as pages, called EDS pages, with one page
equal to size of the EDS window (32 Kbytes). A partic-
ular EDS page is selected through the Data Space
Read register (DSRPAG) or Data Space Write register
(DSWPAG). For PSV, only the DSRPAG register is
used. The combination of the DSRPAG register value
and the 16-bit wide data address forms a 24-bit
Effective Address (EA).
FIGURE 4-4:
EXTENDED DATA SPACE
Special
Function
Registers
0000h
0800h
Internal
Data
Memory
Space
(up to
30 Kbytes)
8000h
008000h
FF8000h
The data addressing range of PIC24FJ128GA310 family
devices depends on the version of the Enhanced
Parallel Master Port implemented on a particular device;
this is in turn a function of device pin count. Table 4-35
lists the total memory accessible by each of the devices
in this family. For more details on accessing external
memory using EPMP, refer to the “PIC24F Family Refer-
ence Manual”, Section 42. “Enhanced Parallel Master
Port (EPMP)” (DS39730).
.
TABLE 4-35: TOTAL ACCESSIBLE DATA
MEMORY
Family
Internal
RAM
External RAM
Access Using
EPMP
PIC24FJXXXGA310
PIC24FJXXXGA308
PIC24FJXXXGA306
8K
Up to 16 MB
8K
Up to 64K
8K
Up to 64K
Note:
Accessing Page 0 in the EDS window will
generate an address error trap as Page 0
is the base data memory (data locations
0800h to 7FFFh in the lower data space).
EDS Pages
000000h
7F8000h
000001h
7F8001h
32-Kbyte
EDS
Window
External
Memory
Access
using
EPMP⁽¹⁾
External
Memory
Access
using
EPMP⁽¹⁾
Program
Space
Access
(Lower
Word)
Program
Space
Access
(Lower
Word)
Program
Space
Access
(Upper
Word)
Program
Space
Access
(Upper
Word)
Note 1:
FFFEh
00FFFEh
DSxPAG
= 001h
FFFFFEh
DSx PAG
= 1FFh
007FFEh
DSRPAG
= 200h
7FFFFEh
DSRPAG
= 2FFh
007FFFh
DSRPAG
= 300h
EPMP Memory Space⁽¹⁾
Program Memory
The range of addressable memory available is dependent on the device pin count and EPMP implementation.
7FFFFFh
DSRPAG
= 3FFh
 2010-2011 Microchip Technology Inc.
DS39996F-page 65