PIC24FJ128GA310-I Datasheet, PDF (1/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers
with LCD Controller and nanoWatt XLP Technology
Extreme Low-Power Features:
• Multiple Power Management Options for Extreme
Power Reduction:
- VBAT allows the device to transition to a back-up
battery for the lowest power consumption with
RTCC
- Deep Sleep allows near total power-down, with
the ability to wake-up on external triggers
- Sleep and Idle modes selectively shut down
peripherals and/or core for substantial power
reduction and fast wake-up
- Doze mode allows CPU to run at a lower clock
speed than peripherals
• Alternate Clock modes Allow On-the-Fly Switching to
a Lower Clock Speed for Selective Power Reduction
• Extreme Low-Power Current Consumption for
Deep Sleep:
- WDT: 270 nA @ 3.3V typical
- RTCC: 400 nA @ 32 kHz, 3.3V typical
- Deep Sleep current, 40 na, 3.3V typical
Peripheral Features:
• LCD Display Controller:
- Up to 60 segments by 8 commons
- Internal charge pump and low-power, internal
resistor biasing
- Operation in Sleep mode
• Up to Five External Interrupt Sources
• Peripheral Pin Select (PPS): Allows Independent I/O
Mapping of Many Peripherals
• Five 16-Bit Timers/Counters with Prescaler:
- Can be paired as 32-bit timers/counters
• Six-Channel DMA supports All Peripheral modules
- Minimizes CPU overhead and increases data
throughput
Peripheral Features (continued):
• Seven Input Capture modules, each with a
Dedicated 16-Bit Timer
• Seven Output Compare/PWM modules, each with a
Dedicated 16-Bit Timer
• Enhanced Parallel Master/Slave Port (EPMP/EPSP)
• Hardware Real-Time Clock/Calendar (RTCC):
- Runs in Deep Sleep and VBAT modes
• Two 3-Wire/4-Wire SPI modules (support 4 Frame
modes) with 8-Level FIFO Buffer
• Two I²C™ modules Support Multi-Master/Slave
mode and 7-Bit/10-Bit Addressing
• Four UART modules:
- Support RS-485, RS-232 and LIN/J2602
- On-chip hardware encoder/decoder for IrDA^®
- Auto-wake-up on Auto-Baud Detect
- 4-level deep FIFO buffer
• Programmable 32-bit Cyclic Redundancy Check
(CRC) Generator
• Digital Signal Modulator Providers On-Chip FSK and
PSK Modulation for a Digital Signal Stream
• Configurable Open-Drain Outputs on Digital I/O Pins
• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
Analog Features:
• 10/12-Bit, 24-Channel Analog-to-Digital (A/D) Converter:
- Conversion rate of 500 ksps (10-bit), 200 ksps (12-bit)
- Conversion available during Sleep and Idle
• Three Rail-to-Rail Enhanced Analog Comparators
with Programmable Input/Output Configuration
• On-Chip Programmable Voltage Reference
• Charge Time Measurement Unit (CTMU):
- Used for capacitive touch sensing, up to 24 channels
- Time measurement down to 1 ns resolution
- CTMU temperature sensing
Memory
Remappable Peripherals
Device
PIC24FJ128GA310
100 128K 8K
5
7
7
4
2
2 24 3 24 Y 480 Y Y
PIC24FJ128GA308
80 128K 8K 5 7 7 4 2 2 16 3 16 Y 368 Y Y
PIC24FJ128GA306
64 128K 8K 5 7 7 4 2 2 16 3 16 Y 240 Y Y
PIC24FJ64GA310
100 64K 8K 5 7 7 4 2 2 24 3 24 Y 480 Y Y
PIC24FJ64GA308
80 64K 8K 5 7 7 4 2 2 16 3 16 Y 368 Y Y
PIC24FJ64GA306
64 64K 8K 5 7 7 4 2 2 16 3 16 Y 240 Y Y
 2010-2011 Microchip Technology Inc.
DS39996F-page 1