PIC24FJ128GA310-I Datasheet, PDF (12/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
1.2 DMA Controller
PIC24FJ128GA310 family devices also introduce a
new Direct Memory Access Controller (DMA) to the
PIC24F architecture. This module acts in concert with
the CPU, allowing data to move between data memory
and peripherals without the intervention of the CPU,
increasing data throughput and decreasing execution
time overhead. Six independently programmable chan-
nels make it possible to service multiple peripherals at
virtually the same time, with each channel peripheral
performing a different operation. Many types of data
transfer operations are supported.
1.3 LCD Controller
With the PIC24FJ128GA310 family of devices,
Microchip introduces its versatile Liquid Crystal Display
(LCD) controller and driver to the PIC24F family. The
on-chip LCD driver includes many features that make
the integration of displays in low-power applications
easier. These include an integrated voltage regulator
with charge pump and an integrated internal resistor
ladder that allows contrast control in software and
display operation above device VDD.
1.4 Other Special Features
• Peripheral Pin Select: The Peripheral Pin Select
(PPS) feature allows most digital peripherals to be
mapped over a fixed set of digital I/O pins. Users
may independently map the input and/or output of
any one of the many digital peripherals to any one
of the I/O pins.
• Communications: The PIC24FJ128GA310 family
incorporates a range of serial communication
peripherals to handle a range of application
requirements. There are two independent I²C™
modules that support both Master and Slave
modes of operation. Devices also have, through
the PPS feature, four independent UARTs with
built-in IrDA^® encoders/decoders and two SPI
modules.
• Analog Features: All members of the
PIC24FJ128GA310 family include the new 12-bit
A/D Converter (A/D) module and a triple compara-
tor module. The A/D module incorporates a range
of new features that allow the converter to assess
and make decisions on incoming data, reducing
CPU overhead for routine A/D conversions. The
comparator module includes three analog com-
parators that are configurable for a wide range of
operations.
• CTMU Interface: In addition to their other analog
features, members of the PIC24FJ128GA310
family include the CTMU interface module. This
provides a convenient method for precision time
measurement and pulse generation, and can
serve as an interface for capacitive sensors.
• Enhanced Parallel Master/Parallel Slave Port:
This module allows rapid and transparent access
to the microcontroller data bus, and enables the
CPU to directly address external data memory. The
parallel port can function in Master or Slave mode,
accommodating data widths of 4, 8 or 16 bits, and
address widths up to 23 bits in Master modes.
• Real-Time Clock and Calendar (RTCC): This
module implements a full-featured clock and
calendar with alarm functions in hardware, freeing
up timer resources and program memory space
for use of the core application.
• Data Signal Modulator (DSM): The Data Signal
Modulator (DSM) allows the user to mix a digital
data stream (the “modulator signal”) with a carrier
signal to produce a modulated output.
1.5 Details on Individual Family
Members
Devices in the PIC24FJ128GA310 family are available
in 64-pin, 80-pin and 100-pin packages. The general
block diagram for all devices is shown in Figure 1-1.
The devices are differentiated from each other in
six ways:
1. Flash program memory (64 Kbytes for
PIC24FJ64GA3XX devices and 128 Kbytes for
PIC24FJ128GA3XX devices).
2. Available I/O pins and ports (53 pins on 6 ports
for 64-pin devices, 69 pins on 7 ports for 80-pin
devices and 85 pins on 7 ports for 100-pin
devices).
3. Available Interrupt-on-Change Notification (ICN)
inputs (52 on 64-pin devices, 66 on 80-pin
devices and 82 on 100-pin devices).
4. Available remappable pins (29 pins on 64-pin
devices, 40 on 80-pin devices and 44 pins on
100-pin devices).
5. Maximum available drivable LCD pixels (272 on
64-pin devices, 368 on 80-pin devices and
480 on 100-pin devices.)
6. Analog input channels (16 channels for 64-pin
and 80-pin devices, and 24 channels for 100-pin
devices).
All other features for devices in this family are identical.
These are summarized in Table 1-1, Table 1-2 and
Table 1-3.
A list of the pin features available on the
PIC24FJ128GA310 family devices, sorted by function,
is shown in Table 1-4. Note that this table shows the pin
location of individual peripheral features and not how
they are multiplexed on the same pin. This information
is provided in the pinout diagrams in the beginning of
the data sheet. Multiplexed features are sorted by the
priority given to a feature, with the highest priority
peripheral being listed first.
PIC24FJDS39996F-page 12
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