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| PIC24FJ128GA310-I Datasheet, PDF (252/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology | |||
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PIC24FJ128GA310 FAMILY
REGISTER 19-3: MDCAR: MODULATOR CARRIER CONTROL REGISTER
R/W-x
R/W-x
R/W-x
U-0
CHODIS
CHPOL
CHSYNC
â
bit 15
R/W-x
CH3(1)
R/W-x
CH2(1)
R/W-x
CH1(1)
R/W-0
R/W-x
R/W-x
U-0
CLODIS
CLPOL
CLSYNC
â
bit 7
R/W-x
CL3(1)
R/W-x
CL2(1)
R/W-x
CL1(1)
R/W-x
CH0(1)
bit 8
R/W-x
CL0(1)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11-8
bit 7
bit 6
bit 5
bit 4
bit 3-0
CHODIS: Modulator High Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by CH<3:0>) is disabled
0 = Output signal driving the peripheral output pin is enabled
CHPOL: Modulator High Carrier Polarity Select bit
1 = Selected high carrier signal is inverted
0 = Selected high carrier signal is not inverted
CHSYNC: Modulator High Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the high carrier before allowing a switch to the low carrier
0 = Modulator output is not synchronized to the high time carrier signal(1)
Unimplemented: Read as â0â
CH<3:0> Modulator Data High Carrier Selection bits(1)
1111
. . . = Reserved
1011
1010 = Output Compare/PWM Module 7 output
1001 = Output Compare/PWM Module 6 output
1000 = Output Compare/PWM Module 5 output
0111 = Output Compare/PWM Module 4 output
0110 = Output Compare/PWM Module 3 output
0101 = Output Compare/PWM Module 2 output
0100 = Output Compare/PWM Module 1 output
0011 = Reference clock (REFO) output
0010 = Input on MDCIN2 pin
0001 = Input on MDCIN1 pin
0000 = VSS
CLODIS: Modulator Low Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by CL<3:0>) is disabled
0 = Output signal driving the peripheral output pin is enabled
CLPOL: Modulator Low Carrier Polarity Select bit
1 = Selected low carrier signal is inverted
0 = Selected low carrier signal is not inverted
CLSYNC: Modulator Low Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the low carrier before allowing a switch to the high carrier
0 = Modulator output is not synchronized to the low time carrier signal(1)
Unimplemented: Read as â0â
CL<3:0> Modulator Data Low Carrier Selection bits(1)
Bit settings are identical to those for CH<3:0>.
Note 1: Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.
DS39996F-page 252
ï£ 2010-2011 Microchip Technology Inc.
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