PIC24FJ128GA310-I Datasheet, PDF (266/406 Pages) Microchip Technology – 64/80/100-Pin, General Purpose, 16-Bit Flash Microcontrollers with LCD Controller and nanoWatt XLP Technology

PIC24FJ128GA310 FAMILY
21.1 Registers
The LCD controller has up to 40 registers:
• LCD Control Register (LCDCON)
• LCD Charge Pump Control Register (LCDREG)
• LCD Phase Register (LCDPS)
• LCD Voltage Ladder Control Register (LCDREF)
• Four LCD Segment Enable Registers
(LCDSE3:LCDSE0)
• Up to 32 LCD Data Registers
(LCDDATA31:LCDDATA0)
REGISTER 21-1: LCDCON: LCD CONTROL REGISTER
R/W-0
U-0
R/W-0
U-0
U-0
U-0
U-0
U-0
LCDEN
—
LCDSIDL
—
—
—
—
—
bit 15
bit 8
U-0
—
bit 7
R/W-0
SLPEN
R/C-0
WERR
R/W-0
CS1
R/W-0
CS0
R/W-0
LMUX2
R/W-0
LMUX1
R/W-0
LMUX0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5
bit 4-3
LCDEN: LCD Driver Enable bit
1 = LCD driver module is enabled
0 = LCD driver module is disabled
Unimplemented: Read as ‘0’
LCDSIDL: Stop LCD Drive in CPU Idle Mode Control bit
1 = LCD driver Halts in CPU Idle mode
0 = LCD driver continues to operate in CPU Idle mode
Unimplemented: Read as ‘0’
SLPEN: LCD Driver Enable in Sleep mode bit
1 = LCD driver module is disabled in Sleep mode
0 = LCD driver module is enabled in Sleep mode
WERR: LCD Write Failed Error bit
1 = LCDDATAx register is written while WA (LCDPS<4>) = 0 (must be cleared in software)
0 = No LCD write error
CS<1:0>: Clock Source Select bits
00 = FRC
01 = LPRC
1x = SOSC
DS39996F-page 266
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