PIC32MX5XX_11 Datasheet, PDF (84/256 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-bit Flash Microcontrollers

TABLE 4-15:
SPI1 REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L,
PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L,
PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES⁽¹⁾
Bits
Register
Name
31/15
30/14
29/13
28/12
27/11
26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
31:16 FRMEN FRMSYNC FRMPOL MSSEN FRMSYPW
FRMCNT<2:0>
—
—
—
—
5E00 SPI1CON
15:0
ON
FRZ
SIDL DISSDO MODE32 MODE16 SMP
CKE
SSEN
CKP
MSTEN
—
—
—
STXISEL<1:0>
SPIFE ENHBUF 0000
SRXISEL<1:0> 0000
31:16 —
—
—
RXBUFELM<4:0>
—
—
—
TXBUFELM<4:0>
0000
5E10 SPI1STAT
15:0
—
—
—
—
SPIBUSY
—
—
SPITUR SRMT SPIROV SPIRBE
—
SPITBE
—
SPITBF SPIRBF 0008
31:16
5E20 SPI1BUF
15:0
DATA<31:0>
0000
0000
31:16 —
5E30 SPI1BRG
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— 0000
15:0
—
—
—
—
—
—
—
BRG<8:0>
0000
Legend:
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table except SPIxBUF have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers”
for more information.