PIC32MX5XX_11 Datasheet, PDF (241/256 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-bit Flash Microcontrollers

PIC32MX5XX/6XX/7XX
TABLE B-1: MAJOR SECTION UPDATES (CONTINUED)
Section Name
Update Description
4.0 “Memory Organization”
Updated all register tables to include the Virtual Address and All Resets
columns.
Updated the title of Figure 4-4 to include the PIC32MX575F256L device.
Updated the title of Figure 4-6 to include the PIC32MX695F512L and
PIC32MX695F512H devices. Also changed PIC32MX795F512L to
PIC32MX795F512H.
Updated the title of Table 4-3 to include the PIC32MX695F512H device.
Updated the title of Table 4-5 to include the PIC32MX575F5256L device.
Updated the title of Table 4-6 to include the PIC32MX695F512L device.
Reversed the order of Table 4-11 and Table 4-12.
Reversed the order of Table 4-14 and Table 4-15.
Updated the title of Table 4-15 to include the PIC32MX575F256L and
PIC32MX695F512L devices.
Updated the title of Table 4-45 to include the PIC32MX575F256L device.
12.0 “I/O Ports”
22.0 “10-bit Analog-to-Digital
Converter (ADC)”
28.0 “Special Features”
Updated the title of Table 4-47 to include the PIC32MX695F512H and
PIC32MX695F512L devices.
Updated the second paragraph of 12.1.2 “Digital Inputs” and removed Table
12-1.
Updated the ADC Conversion Clock Period Block Diagram (see Figure 22-2).
Removed references to the ENVREG pin in 28.3 “On-Chip Voltage
Regulator”.
Updated the first sentence of 28.3.1 “On-Chip Regulator and POR” and
28.3.2 “On-Chip Regulator and BOR”.
31.0 “Electrical Characteristics”
Updated the Connections for the On-Chip Regulator (see Figure 28-2).
Updated the Absolute Maximum Ratings and added Note 3.
Added Thermal Packaging Characteristics for the 121-pin XBGA package
(see Table 31-3).
Updated the Operating Current (IDD) DC Characteristics (see Table 31-5).
Updated the Idle Current (IIDLE) DC Characteristics (see Table 31-6).
Updated the Power-Down Current (IPD) DC Characteristics (see Table 31-7).
Removed Note 1 from the Program Flash Memory Wait State Characteristics
(see Table 31-12).
32.0 “Packaging Information”
“Product Identification System”
Updated the SPIx Module Slave Mode (CKE = 1) Timing Characteristics,
changing SP52 to SP35 between the MSb and Bit 14 on SDOx (see
Figure 31-13).
Added the 121-pin XBGA package marking information and package details.
Added the definition for BG (121-lead 10x10x1.1 mm, XBGA).
Added the definition for Speed.
© 2009-2011 Microchip Technology Inc.
DS61156G-page 241