PIC32MX5XX_11 Datasheet, PDF (67/256 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-bit Flash Microcontrollers

TABLE 4-4:
INTERRUPT REGISTER MAP FOR PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H AND
PIC32MX795F512H DEVICES⁽¹⁾
Bits
31/15 30/14 29/13 28/12 27/11 26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SS0
1000 INTCON
15:0
—
FRZ
—
MVEC
—
TPC<2:0>
—
—
—
INT4EP INT3EP INT2EP INT1EP INT0EP
1010 INTSTAT^{(3) 31:16}
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
15:0
—
—
—
—
—
SRIPL<2:0>
—
—
VEC<5:0>
31:16
1020 IPTMR
15:0
IPTMR<31:0>
U1TXIF U1RXIF U1EIF
31:16 I2C1MIF I2C1SIF I2C1BIF SPI3TXIF SPI3RXIF SPI3EIF
—
—
—
OC5IF
IC5IF
T5IF
INT4IF OC4IF
IC4IF
T4IF
1030 IFS0
I2C3MIF I2C3SIF I2C3BIF
15:0 INT3IF
31:16 IC3EIF
OC3IF
IC2EIF
IC3IF
IC1EIF
T3IF
INT2IF OC2IF
ETHIF CAN2IF⁽²⁾ CAN1IF
IC2IF
USBIF
T2IF
FCEIF
INT1IF OC1IF
IC1IF
T1IF
INT0IF
DMA7IF⁽²⁾ DMA6IF⁽²⁾ DMA5IF⁽²⁾ DMA4IF⁽²⁾ DMA3IF
CS1IF
DMA2IF
CS0IF
DMA1IF
CTIF
DMA0IF
U2TXIF U2RXIF U2EIF U3TXIF U3RXIF U3EIF
1040 IFS1
15:0 RTCCIF FSCMIF
—
—
—
SPI4TXIF SPI4RXIF SPI4EIF SPI2TXIF SPI2RXIF SPI2EIF CMP2IF CMP1IF PMPIF AD1IF
CNIF
I2C5MIF I2C5SIF I2C5BIF I2C4MIF I2C4SIF I2C4BIF
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1050 IFS2
15:0
—
—
—
—
U5TXIF U5RXIF U5EIF U6TXIF U6RXIF U6EIF U4TXIF U4RXIF U4EIF PMPEIF IC5EIF IC4EIF
U1TXIE U1RXIE U1EIE
31:16 I2C1MIE I2C1SIE I2C1BIE SPI3TXIE SPI3RXIE SPI3EIE
—
—
—
OC5IE
IC5IE
T5IE
INT4IE OC4IE
IC4IE
T4IE
1060 IEC0
I2C3MIE I2C3SIE I2C3BIE
15:0 INT3IE
31:16 IC3EIE
OC3IE
IC2EIE
IC3IE
IC1EIE
T3IE
INT2IE OC2IE
ETHIE CAN2IE⁽²⁾ CAN1IE
IC2IE
USBIE
T2IE
INT1IE OC1IE
IC1IE
T1IE
INT0IE CS1IE CS0IE
CTIE
FCEIE DMA7IE⁽²⁾ DMA6IE⁽²⁾ DMA5IE⁽²⁾ DMA4IE⁽²⁾ DMA3IE DMA2IE DMA1IE DMA0IE
U2TXIE U2RXIE U2EIE U3TXIE U3RXIE U3EIE
1070 IEC1
15:0 RTCCIE FSCMIE
—
—
—
SPI4TXIE SPI4RXIE SPI4EIE SPI2TXIE SPI2RXIE SPI2EIE CMP2IE CMP1IE PMPIE AD1IE
CNIE
I2C5MIE I2C5SIE I2C5BIE I2C4MIE I2C4SIE I2C4BIE
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1080 IEC2
15:0
—
—
—
—
U5TXIE U5RXIE U5EIE U6TXIE U6RXIE U6EIE U4TXIE U4RXIE U4EIE PMPEIE IC5EIE IC4EIE
31:16 —
—
—
1090 IPC0
15:0
—
—
—
INT0IP<2:0>
CS0IP<2:0>
INT0IS<1:0>
CS0IS<1:0>
—
—
—
—
—
—
CS1IP<2:0>
CTIP<2:0>
CS1IS<1:0>
CTIS<1:0>
31:16 —
—
—
10A0 IPC1
15:0
—
—
—
INT1IP<2:0>
IC1IP<2:0>
INT1IS<1:0>
IC1IS<1:0>
—
—
—
—
—
—
OC1IP<2:0>
T1IP<2:0>
OC1IS<1:0>
T1IS<1:0>
31:16 —
—
—
10B0 IPC2
15:0
—
—
—
INT2IP<2:0>
IC2IP<2:0>
INT2IS<1:0>
IC2IS<1:0>
—
—
—
—
—
—
OC2IP<2:0>
T2IP<2:0>
OC2IS<1:0>
T2IS<1:0>
31:16 —
—
—
10C0 IPC3 _15:0
—
—
—
INT3IP<2:0>
IC3IP<2:0>
INT3IS<1:0>
IC3IS<1:0>
—
—
—
—
—
—
OC3IP<2:0>
T3IP<2:0>
OC3IS<1:0>
T3IS<1:0>
Legend:
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
2:
3:
Except where noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV
Registers” for more information.
This bit is unimplemented on PIC32MX764F128H device.
This register does not have associated CLR, SET, and INV registers.
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000