PIC32MX5XX_11 Datasheet, PDF (52/256 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-bit Flash Microcontrollers

PIC32MX5XX/6XX/7XX
TABLE 3-2: COPROCESSOR 0 REGISTERS
Register
Number
Register
Name
Function
0-6
7
8
9
10
11
12
12
12
12
13
14
15
15
16
16
16
16
17-22
23
24
25-29
30
31
Note 1:
2:
Reserved
Reserved.
HWREna
BadVAddr⁽¹⁾
Count⁽¹⁾
Enables access via the RDHWR instruction to selected hardware registers.
Reports the address for the most recent address-related exception.
Processor cycle count.
Reserved
Compare⁽¹⁾
Status⁽¹⁾
IntCtl⁽¹⁾
SRSCtl⁽¹⁾
SRSMap⁽¹⁾
Cause⁽¹⁾
EPC⁽¹⁾
Reserved.
Timer interrupt control.
Processor status and control.
Interrupt system status and control.
Shadow register set status and control.
Provides mapping from vectored interrupt to a shadow set.
Cause of last general exception.
Program counter at last exception.
PRId
Processor identification and revision.
EBASE
Exception vector base register.
Config
Configuration register.
Config1
Configuration Register 1.
Config2
Configuration Register 2.
Config3
Configuration Register 3.
Reserved
Debug⁽²⁾
DEPC⁽²⁾
Reserved.
Debug control and exception status.
Program counter at last debug exception.
Reserved
ErrorEPC⁽¹⁾
DESAVE⁽²⁾
Reserved.
Program counter at last error.
Debug handler scratchpad register.
Registers used in exception processing.
Registers used during debug.
DS61156G-page 52
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