PIC32MX5XX_11 Datasheet, PDF (105/256 Pages) Microchip Technology – High-Performance, USB, CAN and Ethernet 32-bit Flash Microcontrollers

TABLE 4-41: RTCC REGISTER MAP⁽¹⁾
Bits
31/15 30/14 29/13
28/12
27/11 26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
31:16 —
—
—
—
0200 RTCCON
15:0
ON
FRZ
SIDL
—
—
—
CAL<9:0>
—
—
—
— RTSECSEL RTCCLKON —
— RTCWREN RTCSYNC HALFSEC RTCOE
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0210 RTCALRM
15:0 ALRMEN CHIME
PIV ALRMSYNC
AMASK<3:0>
ARPT<7:0>
31:16
0220 RTCTIME
15:0
HR10<3:0>
SEC10<3:0>
HR01<3:0>
SEC01<3:0>
MIN10<3:0>
MIN01<3:0>
—
—
—
—
—
—
—
—
31:16
0230 RTCDATE
15:0
YEAR10<3:0>
DAY10<3:0>
YEAR01<3:0>
DAY01<3:0>
MONTH10<3:0>
—
—
—
—
MONTH01<3:0>
WDAY01<3:0>
31:16
0240 ALRMTIME
15:0
HR10<3:0>
SEC10<3:0>
HR01<3:0>
SEC01<3:0>
MIN10<3:0>
MIN01<3:0>
—
—
—
—
—
—
—
—
31:16 —
—
—
—
—
—
—
—
MONTH10<3:0>
0250 ALRMDATE
15:0
DAY10<3:0>
DAY01<3:0>
—
—
—
—
MONTH01<3:0>
WDAY01<3:0>
Legend:
Note 1:
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
0000
0000
0000
0000
xxxx
xx00
xxxx
xx00
xxxx
xx00
00xx
xx0x