PIC18F45J10 Datasheet, PDF (60/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

PIC18F45J10 FAMILY
TABLE 5-2: REGISTER FILE SUMMARY (PIC18F24J10/25J10/44J10/45J10) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on Details
POR, BOR on page:
TMR0H
Timer0 Register High Byte
0000 0000 44, 113
TMR0L
Timer0 Register Low Byte
xxxx xxxx 44, 113
T0CON
TMR0ON T08BIT
T0CS
T0SE
PSA
T0PS2
T0PS1
T0PS0 1111 1111 44, 111
OSCCON
IDLEN
—
—
—
OSTS
—
SCS1
SCS0 0--- q-00 28, 44
WDTCON
—
—
—
—
—
—
—
SWDTEN --- ---0 44, 235
RCON
IPEN
—
—
RI
TO
PD
POR
BOR⁽¹⁾ 0--1 11q0 38, 42, 90
TMR1H
Timer1 Register High Byte
xxxx xxxx 44, 119
TMR1L
Timer1 Register Low Byte
xxxx xxxx 44, 119
T1CON
RD16
T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 44, 115
TMR2
Timer2 Register
0000 0000 44, 122
PR2
Timer2 Period Register
1111 1111 44, 122
T2CON
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 44, 121
SSP1BUF
SSP1ADD
MSSP1 Receive Buffer/Transmit Register
MSSP1 Address Register in I²C™ Slave mode. MSSP1 Baud Rate Reload Register in I²C Master mode.
xxxx xxxx 44, 154
0000 0000 44, 155
SSP1STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
0000 0000 44, 146,
156
SSP1CON1 WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0 0000 0000 44, 147,
157
SSP1CON2 GCEN ACKSTAT ACKDT
ACKEN
RCEN
PEN
RSEN
SEN 0000 0000 44, 158
ADRESH A/D Result Register High Byte
xxxx xxxx 44, 218
ADRESL A/D Result Register Low Byte
xxxx xxxx 44, 218
ADCON0
ADCAL
—
CHS3
CHS2
CHS1
CHS0 GO/DONE ADON 0-00 0000 44, 209
ADCON1
—
—
VCFG1
VCFG0
PCFG3
PCFG2
PCFG1
PCFG0 --00 0qqq 44, 210
ADCON2
ADFM
—
ACQT2
ACQT1
ACQT0
ADCS2
ADCS1
ADCS0 0-00 0000 44, 211
CCPR1H Capture/Compare/PWM Register 1 High Byte
xxxx xxxx 45, 124
CCPR1L Capture/Compare/PWM Register 1 Low Byte
CCP1CON
P1M1⁽²⁾
P1M0⁽²⁾
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
xxxx xxxx 45, 124
CCP1M0 0000 0000 45, 123,
CCPR2H Capture/Compare/PWM Register 2 High Byte
xxxx xxxx 45, 124
CCPR2L Capture/Compare/PWM Register 2 Low Byte
xxxx xxxx 45, 124
CCP2CON
—
—
DC2B1
DC2B0
CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 45, 123
BAUDCON
ECCP1DEL
ECCP1AS
ABDOVF
PRSEN
ECCPASE
RCIDL
PDC6⁽²⁾
ECCPAS2
—
PDC5⁽²⁾
ECCPAS1
SCKP
PDC4⁽²⁾
ECCPAS0
BRG16
PDC3⁽²⁾
PSSAC1
—
PDC2⁽²⁾
PSSAC0
WUE
PDC1⁽²⁾
PSSBD1⁽²⁾
ABDEN
PDC0⁽²⁾
PSSBD0⁽²⁾
01-0 0-00
0000 0000
0000 0000
45, 190
45, 140
45, 141
CVRCON
CVREN
CVROE
CVRR
CVRSS
CVR3
CVR2
CVR1
CVR0 0000 0000 45, 225
CMCON
C2OUT
C1OUT
C2INV
C1INV
CIS
CM2
CM1
CM0 0000 0111 45, 219
Legend:
Note 1:
2:
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
See Section 4.4 “Brown-out Reset (BOR) (PIC18F2X1X/4X1X Devices Only)”.
These registers and/or bits are not implemented on 28-pin devices and are read as ‘0’. Reset values are shown for 40/44-pin devices;
individual unimplemented bits should be interpreted as ‘-’.
DS39682C-page 58
Preliminary
© 2007 Microchip Technology Inc.