PIC18F45J10 Datasheet, PDF(47/358 Page) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

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PIC18F45J10 Datasheet, PDF (47/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

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PIC18F45J10 FAMILY

TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets

WDT Reset

RESET Instruction

Stack Resets

Wake-up via WDT

or Interrupt

CCPR1H

PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx

uuuu uuuu

uuuu uuuu

CCPR1L

PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx

uuuu uuuu

uuuu uuuu

CCP1CON PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

CCPR2H

PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx

uuuu uuuu

uuuu uuuu

CCPR2L

PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx

uuuu uuuu

uuuu uuuu

CCP2CON PIC18F2XJ10 PIC18F4XJ10 --00 0000

--00 0000

--uu uuuu

BAUDCON PIC18F2XJ10 PIC18F4XJ10 01-0 0-00

01-0 0-00

uu-u u-uu

ECCP1DEL PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

ECCP1AS

PIC18F2XJ10 PIC18F4XJ10

0000 0000

0000 0000

uuuu uuuu

CVRCON

PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

CMCON

PIC18F2XJ10 PIC18F4XJ10 0000 0111

0000 0111

uuuu uuuu

SPBRGH

PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

SPBRG

PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

RCREG

PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

TXREG

PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx

uuuu uuuu

uuuu uuuu

TXSTA

PIC18F2XJ10 PIC18F4XJ10 0000 0010

0000 0010

uuuu uuuu

RCSTA

PIC18F2XJ10 PIC18F4XJ10 0000 000x

0000 000x

uuuu uuuu

EECON2

PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

EECON1

PIC18F2XJ10 PIC18F4XJ10 ---0 x00-

---0 x00-

---u uuu-

IPR3

PIR3

PIC18F2XJ10 PIC18F4XJ10

PIC18F2XJ10 PIC18F4XJ10

11-- ----

00-- ----

11-- ----

00-- ----

uu-- ----

uu-- ----(3)

PIE3

PIC18F2XJ10 PIC18F4XJ10 00-- ----

00-- ----

uu-- ----

IPR2

PIR2

PIC18F2XJ10 PIC18F4XJ10

PIC18F2XJ10 PIC18F4XJ10

11-- 1--1

00-- 0--0

11-- 1--1

00-- 0--0

uu-- u--u

uu-- u--u(3)

PIE2

PIC18F2XJ10 PIC18F4XJ10 00-- 0--0

00-- 0--0

uu-- u--u

IPR1

PIR1

PIC18F2XJ10 PIC18F4XJ10

PIC18F2XJ10 PIC18F4XJ10

1111 1111

0000 0000

1111 1111

0000 0000

uuuu uuuu

uuuu uuuu(3)

PIE1

PIC18F2XJ10 PIC18F4XJ10 0000 0000

0000 0000

uuuu uuuu

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

4: See Table 4-1 for Reset value for specific condition.

Â© 2007 Microchip Technology Inc.

Preliminary

DS39682C-page 45

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