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PIC18F45J10 Datasheet, PDF (233/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology | |||
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PIC18F45J10 FAMILY
REGISTER 20-1:
CONFIG1L: CONFIGURATION REGISTER 1 LOW (BYTE ADDRESS 300000h)
R/WO-1 R/WO-1 R/WO-1
U-0
U-0
U-0
U-0
R/WO-1
DEBUG XINST STVREN
â
â
â
â
WDTEN
bit 7
bit 0
bit 7
bit 6
bit 5
bit 4-1
bit 0
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Reset on stack overflow/underflow enabled
0 = Reset on stack overflow/underflow disabled
Unimplemented: Read as â0â
WDTEN: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled (control is placed on SWDTEN bit)
Legend:
R = Readable bit
WO = Write-once bit
-n = Value when device is unprogrammed
U = Unimplemented bit, read as â0â
â1â = Bit is set
â0â = Bit is cleared
REGISTER 20-2:
CONFIG1H: CONFIGURATION REGISTER 1 HIGH (BYTE ADDRESS 300001h)
U-0
U-0
U-0
U-0
U-0
R/WO-1
U-0
U-0
â
â
â
â
â(1)
CP0
â
â
bit 7
bit 0
bit 7-3
bit 2
bit 1-0
Unimplemented: Read as â0â
CP0: Code Protection bit
1 = Program memory is not code-protected
0 = Program memory is code-protected
Unimplemented: Read as â0â
Note 1: This bit should always be maintained as â0â.
Legend:
R = Readable bit
WO = Write-once bit
-n = Value when device is unprogrammed
U = Unimplemented bit, read as â0â
â1â = Bit is set
â0â = Bit is cleared
© 2007 Microchip Technology Inc.
Preliminary
DS39682C-page 231
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