PIC18F45J10 Datasheet, PDF (345/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

PIC18F45J10 FAMILY
A
A/D .................................................................................... 209
A/D Converter Interrupt, Configuring ........................ 213
Acquisition Requirements ......................................... 214
ADCAL Bit................................................................. 216
ADCON0 Register..................................................... 209
ADCON1 Register..................................................... 209
ADCON2 Register..................................................... 209
ADRESH Register............................................. 209, 212
ADRESL Register ..................................................... 209
Analog Port Pins, Configuring................................... 216
Associated Registers ................................................ 218
Calculating the Minimum Required Acquisition Time 214
Calibration................................................................. 216
Configuring the Module............................................. 213
Conversion Clock (TAD) ............................................ 215
Conversion Status (GO/DONE Bit) ........................... 212
Conversions .............................................................. 217
Converter Characteristics ......................................... 326
Operation in Power-Managed Modes ....................... 216
Selecting and Configuring Acquisition Time ............. 215
Special Event Trigger (CCP)..................................... 218
Special Event Trigger (ECCP) .................................. 132
Use of the CCP2 Trigger........................................... 218
Absolute Maximum Ratings .............................................. 295
AC (Timing) Characteristics .............................................. 309
Load Conditions for Device Timing Specifications.... 310
Parameter Symbology .............................................. 309
Temperature and Voltage Specifications .................. 310
Timing Conditions ..................................................... 310
Access Bank
Mapping with Indexed Literal Offset Mode.................. 65
ACKSTAT ......................................................................... 176
ACKSTAT Status Flag ...................................................... 176
ADCAL Bit ......................................................................... 216
ADCON0 Register............................................................. 209
GO/DONE Bit............................................................ 212
ADCON1 Register............................................................. 209
ADCON2 Register............................................................. 209
ADDFSR ........................................................................... 284
ADDLW ............................................................................. 247
ADDULNK ......................................................................... 284
ADDWF ............................................................................. 247
ADDWFC .......................................................................... 248
ADRESH Register............................................................. 209
ADRESL Register ..................................................... 209, 212
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................. 248
ANDWF ............................................................................. 249
Assembler
MPASM Assembler................................................... 292
Auto-Wake-up on Sync Break Character .......................... 200
B
Bank Select Register (BSR)................................................ 53
Baud Rate Generator ........................................................ 172
BC ..................................................................................... 249
BCF ................................................................................... 250
BF ..................................................................................... 176
BF Status Flag .................................................................. 176
Block Diagrams
A/D ............................................................................ 212
Analog Input Model ................................................... 213
Baud Rate Generator................................................ 172
Capture Mode Operation .......................................... 125
Comparator Analog Input Model............................... 223
Comparator I/O Operating Modes ............................ 220
Comparator Output................................................... 222
Comparator Voltage Reference................................ 226
Comparator Voltage Reference Output Buffer
Example ........................................................... 227
Compare Mode Operation ........................................ 126
Device Clock............................................................... 26
Enhanced PWM........................................................ 133
EUSART Receive ..................................................... 199
EUSART Transmit .................................................... 197
External Power-on Reset Circuit (Slow VDD
Power-up) ........................................................... 39
Fail-Safe Clock Monitor ............................................ 238
Generic I/O Port Operation......................................... 93
Interrupt Logic............................................................. 80
MSSP (I²C Master Mode)......................................... 170
MSSP (I²C Mode)..................................................... 155
MSSP (SPI Mode) .................................................... 145
On-Chip Reset Circuit................................................. 37
PIC18F24J10/25J10................................................... 10
PIC18F44J10/45J10................................................... 11
PLL ............................................................................. 25
PORTD and PORTE (Parallel Slave Port)................ 109
PWM Operation (Simplified) ..................................... 128
Reads from Flash Program Memory .......................... 71
Single Comparator.................................................... 221
Table Read Operation ................................................ 67
Table Write Operation ................................................ 68
Table Writes to Flash Program Memory ..................... 73
Timer0 in 16-Bit Mode .............................................. 112
Timer0 in 8-Bit Mode ................................................ 112
Timer1 ...................................................................... 116
Timer1 (16-Bit Read/Write Mode)............................. 116
Timer2 ...................................................................... 122
Watchdog Timer ....................................................... 235
BN..................................................................................... 250
BNC .................................................................................. 251
BNN .................................................................................. 251
BNOV ............................................................................... 252
BNZ .................................................................................. 252
BOR. See Brown-out Reset.
BOV .................................................................................. 255
BRA .................................................................................. 253
Break Character (12-Bit) Transmit and Receive............... 202
BRG. See Baud Rate Generator.
Brown-out Reset (BOR)...................................................... 39
and On-Chip Voltage Regulator ............................... 236
Disabling in Sleep Mode............................................. 39
BSF................................................................................... 253
BTFSC .............................................................................. 254
BTFSS .............................................................................. 254
BTG .................................................................................. 255
BZ ..................................................................................... 256
C
C Compilers
MPLAB C18.............................................................. 292
MPLAB C30.............................................................. 292
Calibration (A/D Converter) .............................................. 216
CALL................................................................................. 256
CALLW ............................................................................. 285
Capture (CCP Module) ..................................................... 125
Associated Registers................................................ 127
CCP Pin Configuration ............................................. 125
CCPRxH:CCPRxL Registers .................................... 125
© 2007 Microchip Technology Inc.
Preliminary
DS39682C-page 343