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| PIC18F45J10 Datasheet, PDF (206/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology | |||
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PIC18F45J10 FAMILY
FIGURE 16-12: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
RC7/RX/DT pin
bit 0
bit 1
bit 2
bit 6
bit 7
RC6/TX/CK pin
Write to
TXREG reg
TXIF bit
TRMT bit
TXEN bit
TABLE 16-7: REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
43
PIR1
PSPIF(1) ADIF
RCIF
TXIF SSP1IF CCP1IF TMR2IF TMR1IF
45
PIE1
PSPIE(1) ADIE
RCIE
TXIE SSP1IE CCP1IE TMR2IE TMR1IE
45
IPR1
PSPIP(1) ADIP
RCIP
TXIP SSP1IP CCP1IP TMR2IP TMR1IP
45
RCSTA
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
45
TXREG
EUSART Transmit Register
45
TXSTA
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
45
BAUDCON ABDOVF RCIDL
â
SCKP BRG16
â
WUE ABDEN
45
SPBRGH EUSART Baud Rate Generator Register High Byte
45
SPBRG
EUSART Baud Rate Generator Register Low Byte
45
Legend: â = unimplemented, read as â0â. Shaded cells are not used for synchronous master transmission.
Note 1: These bits are not implemented on 28-pin devices and should be read as â0â.
DS39682C-page 204
Preliminary
© 2007 Microchip Technology Inc.
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