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PIC18F45J10 Datasheet, PDF (21/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
PIC18F45J10 FAMILY
TABLE 1-3: PIC18F44J10/45J10 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP Type Type
Description
RC0/T1OSO/T1CKI
RC0
T1OSO
T1CKI
PORTC is a bidirectional I/O port.
15 34 32
I/O ST
O
—
I
ST
Digital I/O.
Timer1 oscillator output.
Timer1 external clock input.
RC1/T1OSI/CCP2
RC1
T1OSI
CCP2(2)
16 35 35
I/O ST
Digital I/O.
I CMOS Timer1 oscillator input.
I/O ST
Capture 2 input/Compare 2 output/PWM 2 output.
RC2/CCP1/P1A
RC2
CCP1
P1A
17 36 36
I/O ST
I/O ST
O
—
Digital I/O.
Capture 1 input/Compare 1 output/PWM 1 output.
Enhanced CCP1 output.
RC3/SCK1/SCL1
RC3
SCK1
SCL1
18 37 37
I/O ST
I/O ST
I/O ST
Digital I/O.
Synchronous serial clock input/output for
SPI™ mode.
Synchronous serial clock input/output for
I2C™ mode.
RC4/SDI1/SDA1
RC4
SDI1
SDA1
23 42 42
I/O ST
I
ST
I/O ST
Digital I/O.
SPI data in.
I2C data I/O.
RC5/SDO1
RC5
SDO1
24 43 43
I/O ST
O
—
Digital I/O.
SPI data out.
RC6/TX/CK
RC6
TX
CK
25 44 44
I/O ST
O
—
I/O ST
Digital I/O.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX/DT).
RC7/RX/DT
RC7
RX
DT
26 1
1
I/O ST
I
ST
I/O ST
Digital I/O.
EUSART asynchronous receive.
EUSART synchronous data (see related TX/CK).
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Default assignment for CCP2 when configuration bit CCP2MX is set.
2: Alternate assignment for CCP2 when configuration bit CCP2MX is cleared.
© 2007 Microchip Technology Inc.
Preliminary
DS39682C-page 19