PIC18F45J10 Datasheet, PDF (313/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology

PIC18F45J10 FAMILY
23.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 23-4:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
Q2
Q3
Q4
Q1
OSC1
CLKO
1
3
3
4
4
2
TABLE 23-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
FOSC
External CLKI Frequency⁽¹⁾
DC
Oscillator Frequency⁽¹⁾
4
1
TOSC
External CLKI Period⁽¹⁾
25
40
MHz EC Oscillator mode
25
MHz HS Oscillator mode
—
ns EC Oscillator mode
Oscillator Period⁽¹⁾
25
250
ns HS Oscillator mode
2
TCY
Instruction Cycle Time⁽¹⁾
100
—
ns TCY = 4/FOSC, Industrial
3
TOSL, External Clock in (OSC1)
10
TOSH
High or Low Time
—
ns EC Oscillator mode
4
TOSR, External Clock in (OSC1)
—
7.5
ns EC Oscillator mode
TOSF
Rise or Fall Time
Note 1:
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations.
All specified values are based on characterization data for that particular oscillator type under standard
operating conditions with the device executing code. Exceeding these specified limits may result in an
unstable oscillator operation and/or higher than expected current consumption. All devices are tested to
operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock input
is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
© 2007 Microchip Technology Inc.
Preliminary
DS39682C-page 311