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PIC18F45J10 Datasheet, PDF (58/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
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PIC18F45J10 FAMILY
5.3.4 SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
the top half of Bank 15 (F80h to FFFh). A list of these
registers is given in Table 5-1 and Table 5-2.
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the periph-
eral functions. The reset and interrupt registers are
described in their respective chapters, while the ALU’s
STATUS register is described later in this section.
Registers related to the operation of a peripheral feature
are described in the chapter for that peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
TABLE 5-1: SPECIAL FUNCTION REGISTER MAP FOR PIC18F45J10 FAMILY DEVICES
Address
Name
FFFh TOSU
FFEh TOSH
FFDh
TOSL
FFCh STKPTR
FFBh PCLATU
FFAh PCLATH
FF9h
PCL
FF8h TBLPTRU
FF7h TBLPTRH
FF6h TBLPTRL
FF5h TABLAT
FF4h PRODH
FF3h PRODL
FF2h INTCON
FF1h INTCON2
FF0h INTCON3
FEFh INDF0(1)
FEEh POSTINC0(1)
FEDh POSTDEC0(1)
FECh PREINC0(1)
FEBh PLUSW0(1)
FEAh FSR0H
FE9h FSR0L
FE8h WREG
FE7h INDF1(1)
FE6h POSTINC1(1)
FE5h POSTDEC1(1)
FE4h PREINC1(1)
FE3h PLUSW1(1)
FE2h FSR1H
FE1h FSR1L
FE0h
BSR
Address
Name
FDFh INDF2(1)
FDEh POSTINC2(1)
FDDh POSTDEC2(1)
FDCh PREINC2(1)
FDBh PLUSW2(1)
FDAh FSR2H
FD9h FSR2L
FD8h STATUS
FD7h TMR0H
FD6h TMR0L
FD5h
FD4h
T0CON
—(2)
FD3h OSCCON
FD2h
—(2)
FD1h WDTCON
FD0h RCON
FCFh TMR1H
FCEh TMR1L
FCDh T1CON
FCCh TMR2
FCBh
PR2
FCAh T2CON
FC9h SSP1BUF
FC8h SSP1ADD
FC7h SSP1STAT
FC6h SSP1CON1
FC5h SSP1CON2
FC4h ADRESH
FC3h ADRESL
FC2h ADCON0
FC1h ADCON1
FC0h ADCON2
Address
Name
FBFh CCPR1H
FBEh CCPR1L
FBDh CCP1CON
FBCh CCPR2H
FBBh CCPR2L
FBAh CCP2CON
FB9h
—(2)
FB8h BAUDCON
FB7h ECCP1DEL(3)
FB6h ECCP1AS(3)
FB5h CVRCON
FB4h
FB3h
FB2h
FB1h
CMCON
—(2)
—(2)
—(2)
FB0h SPBRGH
FAFh SPBRG
FAEh RCREG
FADh TXREG
FACh TXSTA
FABh
FAAh
FA9h
FA8h
FA7h
RCSTA
—(2)
—(2)
—(2)
EECON2(1)
FA6h EECON1
FA5h
IPR3
FA4h
PIR3
FA3h
PIE3
FA2h
IPR2
FA1h
PIR2
FA0h
PIE2
Address
Name
F9Fh
IPR1
F9Eh
PIR1
F9Dh
F9Ch
F9Bh
F9Ah
F99h
F98h
F97h
F96h
F95h
PIE1
—(2)
—(2)
—(2)
—(2)
—(2)
—(2)
TRISE(3)
TRISD(3)
F94h TRISC
F93h TRISB
F92h
F91h
F90h
F8Fh
TRISA
—(2)
—(2)
—(2)
F8Eh
F8Dh
F8Ch
SSP2BUF
LATE(3)
LATD(3)
F8Bh
LATC
F8Ah
LATB
F89h
LATA
F88h SSP2ADD(3)
F87h SSP2STAT(3)
F86h SSP2CON1(3)
F85h SSP2CON2(3)
F84h PORTE(3)
F83h PORTD(3)
F82h PORTC
F81h PORTB
F80h PORTA
Note 1: This is not a physical register.
2: Unimplemented registers are read as ‘0’.
3: This register is not available in 28-pin devices.
DS39682C-page 56
Preliminary
© 2007 Microchip Technology Inc.
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