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| PIC18F45J10 Datasheet, PDF (129/358 Pages) Microchip Technology – 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology | |||
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PIC18F45J10 FAMILY
TABLE 13-3: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
43
RCON
PIR1
PIE1
IPR1
IPEN
PSPIF(1)
PSPIE(1)
PSPIP(1)
â
ADIF
ADIE
ADIP
â
RCIF
RCIE
RCIP
RI
TO
PD
POR
BOR
42
TXIF SSP1IF CCP1IF TMR2IF TMR1IF
45
TXIE SSP1IE CCP1IE TMR2IE TMR1IE
45
TXIP SSP1IP CCP1IP TMR2IP TMR1IP
45
PIR2
OSCFIF CMIF
â
â
BCL1IF
â
â
CCP2IF
45
PIE2
OSCFIE CMIE
â
â
BCL1IE
â
â
CCP2IE
45
IPR2
OSCFIP CMIP
â
â
BCL1IP
â
â
CCP2IP
45
TRISB
PORTB Data Direction Control Register
46
TRISC
PORTC Data Direction Control Register
46
TMR1L
Timer1 Register Low Byte
44
TMR1H
Timer1 Register High Byte
44
T1CON
RD16 T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 44
CCPR1L Capture/Compare/PWM Register 1 Low Byte
45
CCPR1H Capture/Compare/PWM Register 1 High Byte
45
CCP1CON P1M1(1) P1M0(1) DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0
45
CCPR2L Capture/Compare/PWM Register 2 Low Byte
45
CCPR2H Capture/Compare/PWM Register 2 High Byte
45
CCP2CON
â
â
DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 45
Legend: â = unimplemented, read as â0â. Shaded cells are not used by Capture/Compare or Timer1.
Note 1: These bits are not implemented on 28-pin devices and should be read as â0â.
© 2007 Microchip Technology Inc.
Preliminary
DS39682C-page 127
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