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| PIC18F4321 Datasheet, PDF (54/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology | |||
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PIC18F4321 FAMILY
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
IPR2
PIR2
2221 2321 4221 4321
2221 2321 4221 4321
11-1 1111
00-0 0000
11-1 1111
00-0 0000
uu-u uuuu
uu-u uuuu(1)
PIE2
2221 2321 4221 4321 00-0 0000
00-0 0000
uu-u uuuu
IPR1
2221 2321 4221 4321 1111 1111
1111 1111
uuuu uuuu
PIR1
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
-111 1111
0000 0000
-000 0000
-111 1111
0000 0000
-000 0000
-uuu uuuu
uuuu uuuu(1)
-uuu uuuu(1)
PIE1
2221 2321 4221 4321 0000 0000
0000 0000
uuuu uuuu
2221 2321 4221 4321 -000 0000
-000 0000
-uuu uuuu
OSCTUNE 2221 2321 4221 4321 00-0 0000
00-0 0000
uu-u uuuu
TRISE
2221 2321 4221 4321 0000 -111
0000 -111
uuuu -uuu
TRISD
2221 2321 4221 4321 1111 1111
1111 1111
uuuu uuuu
TRISC
2221 2321 4221 4321 1111 1111
1111 1111
uuuu uuuu
TRISB
TRISA(5)
2221 2321 4221 4321
2221 2321 4221 4321
1111 1111
1111 1111(5)
1111 1111
1111 1111(5)
uuuu uuuu
uuuu uuuu(5)
LATE
2221 2321 4221 4321 ---- -xxx
---- -uuu
---- -uuu
LATD
2221 2321 4221 4321 xxxx xxxx
uuuu uuuu
uuuu uuuu
LATC
2221 2321 4221 4321 xxxx xxxx
uuuu uuuu
uuuu uuuu
LATB
LATA(5)
2221 2321 4221 4321
2221 2321 4221 4321
xxxx xxxx
xxxx xxxx(5)
uuuu uuuu
uuuu uuuu(5)
uuuu uuuu
uuuu uuuu(5)
PORTE
2221 2321 4221 4321 ---- xxxx
---- uuuu
---- uuuu
2221 2321 4221 4321 ---- x---
---- u---
---- u---
PORTD
2221 2321 4221 4321 xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTC
2221 2321 4221 4321 xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTB
PORTA(5)
2221 2321 4221 4321
2221 2321 4221 4321
xxxx xxxx
xx0x 0000(5)
uuuu uuuu
uu0u 0000(5)
uuuu uuuu
uuuu uuuu(5)
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read â0â.
DS39689E-page 52
Preliminary
© 2007 Microchip Technology Inc.
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