PIC18F4321 Datasheet, PDF (178/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

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17.4.3.2 Address Masking
Masking an address bit causes that bit to become a
“don’t care”. When one address bit is masked, two
addresses will be Acknowledged and cause an inter-
rupt. It is possible to mask more than one address bit at
a time, which makes it possible to Acknowledge up to
31 addresses in 7-bit Addressing mode and up to 63
addresses in 10-bit Addressing mode (see
Example 17-2).
The I²C slave behaves the same way whether address
masking is used or not. However, when address mask-
ing is used, the I²C slave can Acknowledge multiple
addresses and cause interrupts. When this occurs, it is
necessary to determine which address caused the
interrupt by checking the SSPBUF register.
• 7-bit Address mode
Address mask bits, ADMSK<5:1>, mask the corre-
sponding address bits in the SSPADD register. For any
ADMSK bits that are active (ADMSK<n> = 1), the
corresponding address bit is ignored (ADD<n> = x). For
the module to issue an address Acknowledge, it is suffi-
cient to match only on addresses that do not have an
active address mask.
• 10-bit Address mode
Address mask bits, ADMSK<5:2>, mask the
corresponding address bits in the SSPADD register. In
addition, ADMSK<1> simultaneously masks the two
LSBs of the address, ADD<1:0>. For any ADMSK bits
that are active (ADMSK<n> = 1), the corresponding
address bit is ignored (ADD<n> = x). Also note that
although in 10-bit Addressing mode, the upper address
bits reuse part of the SSPADD register bits, the address
mask bits do not interact with those bits. They only
affect the lower address bits.
Note 1: ADMSK<1> masks the two Least
Significant bits of the address.
2: The two Most Significant bits of the
address are not affected by address
masking.
EXAMPLE 17-2: ADDRESS MASKING
7-bit Addressing mode:
SSPADD<7:1> = 1010 0000
ADMSK<5:1> = 00 111
Addresses Acknowledged = 0xA0, 0xA2, 0xA4, 0xA6, 0xA8, 0xAA, 0xAC, 0xAE
10-bit Addressing mode:
SSPADD<7:0> = 1010 0000 (The two MSbs are ignored in this example since they are not affected)
ADMSK<5:1> = 00 111
Addresses Acknowledged = 0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB,
0xAC, 0xAD, 0xAE, 0xAF
The upper two bits are not affected by the address masking.
DS39689E-page 176
Preliminary
© 2007 Microchip Technology Inc.