PIC18F4321 Datasheet, PDF(51/396 Page) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

PIC18F4321 Datasheet, PDF (51/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

◁

PIC18F4321 FAMILY

TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS

Register

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets,

WDT Reset,

RESET Instruction,

Stack Resets

Wake-up via WDT

or Interrupt

TOSU

TOSH

TOSL

STKPTR

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

---0 0000

0000 0000

0000 0000

00-0 0000

---0 0000

0000 0000

0000 0000

uu-0 0000

---0 uuuu(3)

uuuu uuuu(3)

uuuu uuuu(3)

uu-u uuuu(3)

PCLATU

PCLATH

PCL

TBLPTRU

TBLPTRH

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

--00 0000

0000 0000

0000 0000

--00 0000

0000 0000

--00 0000

0000 0000

0000 0000

--00 0000

0000 0000

--uu uuuu

uuuu uuuu

PC + 2(2)

--uu uuuu

uuuu uuuu

TBLPTRL

2221 2321 4221 4321

0000 0000

0000 0000

uuuu uuuu

TABLAT

2221 2321 4221 4321

0000 0000

0000 0000

uuuu uuuu

PRODH

2221 2321 4221 4321

xxxx xxxx

uuuu uuuu

uuuu uuuu

PRODL

INTCON

INTCON2

INTCON3

INDF0

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

xxxx xxxx

0000 000x

1111 -1-1

11-0 0-00

N/A

uuuu uuuu

0000 000u

1111 -1-1

11-0 0-00

N/A

uuuu uuuu

uuuu uuuu(1)

uuuu -u-u(1)

uu-u u-uu(1)

N/A

POSTINC0 2221 2321 4221 4321

N/A

N/A

N/A

POSTDEC0 2221 2321 4221 4321

N/A

N/A

N/A

PREINC0

2221 2321 4221 4321

N/A

N/A

N/A

PLUSW0

2221 2321 4221 4321

N/A

N/A

N/A

FSR0H

2221 2321 4221 4321

---- 0000

---- 0000

---- uuuu

FSR0L

WREG

INDF1

2221 2321 4221 4321

2221 2321 4221 4321

2221 2321 4221 4321

xxxx xxxx

xxxx xxxx

N/A

uuuu uuuu

uuuu uuuu

N/A

uuuu uuuu

uuuu uuuu

N/A

POSTINC1 2221 2321 4221 4321

N/A

N/A

N/A

POSTDEC1 2221 2321 4221 4321

N/A

N/A

N/A

PREINC1

2221 2321 4221 4321

N/A

N/A

N/A

PLUSW1

2221 2321 4221 4321

N/A

N/A

N/A

Legend:

Note 1:

2:

3:

4:

5:

u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

See Table 4-3 for Reset value for specific condition.

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read â0â.

Â© 2007 Microchip Technology Inc.

Preliminary

DS39689E-page 49

▷