PIC18F4321 Datasheet, PDF (123/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F4321 FAMILY
FIGURE 10-3:
PARALLEL SLAVE PORT WRITE WAVEFORMS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
FIGURE 10-4:
PARALLEL SLAVE PORT READ WAVEFORMS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
TABLE 10-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values on
page
PORTD
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
52
LATD
PORTD Data Latch Register (Read and Write to Data Latch)
52
TRISD PORTD Data Direction Control Register
52
PORTE
—
—
—
—
RE3
RE2
RE1
RE0
52
LATE
—
—
—
—
— PORTE Data Latch Register
52
(Read and Write to Data Latch)
TRISE
IBF
OBF
IBOV PSPMODE
—
TRISE2 TRISE1 TRISE0
52
INTCON GIE/GIEH PEIE/GIEL TMR0IF INT0IE
RBIE TMR0IF INT0IF
RBIF
49
PIR1
PSPIF⁽¹⁾
ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
52
PIE1
PSPIE⁽¹⁾
ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
52
IPR1
PSPIP⁽¹⁾
ADIP
RCIP
TXIP
SSPIP CCP1IP TMR2IP TMR1IP
52
ADCON1
—
—
VCFG1 VCFG0 PCFG3 PCFG2 PCFG1 PCFG0
51
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Note 1: These bits are unimplemented on 28-pin devices and read as ‘0’.
© 2007 Microchip Technology Inc.
Preliminary
DS39689E-page 121