PIC18F4321 Datasheet, PDF (53/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F4321 FAMILY
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
ADRESH
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADRESL
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
2221 2321 4221 4321
--00 0000
--00 0000
--uu uuuu
ADCON1
2221 2321 4221 4321
--00 0qqq
--00 0qqq
--uu uuuu
ADCON2
2221 2321 4221 4321
0-00 0000
0-00 0000
u-uu uuuu
CCPR1H
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1L
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON 2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
2221 2321 4221 4321
--00 0000
--00 0000
--uu uuuu
CCPR2H
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR2L
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP2CON 2221 2321 4221 4321
--00 0000
--00 0000
--uu uuuu
BAUDCON 2221 2321 4221 4321
0100 0-00
0100 0-00
--uu uuuu
ECCP1DEL 2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
ECCP1AS 2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
2221 2321 4221 4321
0000 00--
0000 00--
uuuu uu--
CVRCON
2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
CMCON
2221 2321 4221 4321
0000 0111
0000 0111
uuuu uuuu
TMR3H
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR3L
2221 2321 4221 4321
xxxx xxxx
uuuu uuuu
uuuu uuuu
T3CON
2221 2321 4221 4321
0000 0000
uuuu uuuu
uuuu uuuu
SPBRGH
2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
SPBRG
2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
RCREG
2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
TXREG
2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
TXSTA
2221 2321 4221 4321
0000 0010
0000 0010
uuuu uuuu
RCSTA
2221 2321 4221 4321
0000 000x
0000 000x
uuuu uuuu
EEADR
2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
EEDATA
2221 2321 4221 4321
0000 0000
0000 0000
uuuu uuuu
EECON2
2221 2321 4221 4321
0000 0000
0000 0000
0000 0000
EECON1
2221 2321 4221 4321
xx-0 x000
uu-0 u000
uu-0 u000
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-3 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
© 2007 Microchip Technology Inc.
Preliminary
DS39689E-page 51