PIC18F4321 Datasheet, PDF (233/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

The value in the ADRESH:ADRESL registers is not
modified for a Power-on Reset. The ADRESH:ADRESL
registers will contain unknown data after a Power-on
Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 19.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started. An acquisition time can be programmed to
occur between setting the GO/DONE bit and the actual
start of the conversion.
The following steps should be followed to perform an A/D
conversion:
1. Configure the A/D module:
• Configure analog pins, voltage reference and
digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON2)
• Turn on A/D module (ADCON0)
2. Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
3. Wait the required acquisition time (if required).
4. Start conversion:
• Set GO/DONE bit (ADCON0 register)
PIC18F4321 FAMILY
5. Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
6. Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF, if required.
7. For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as TAD. A minimum wait of 2 TAD is
required before the next acquisition starts.
FIGURE 19-2: A/D TRANSFER FUNCTION
3FFh
3FEh
003h
002h
001h
000h
Analog Input Voltage
FIGURE 19-3:
ANALOG INPUT MODEL
VDD
Rs ^ANx
VT = 0.6V
RIC ≤ 1k
Sampling
Switch
SS _RSS
VAIN
CPIN
5 pF
VT = 0.6V
ILEAKAGE
±100 nA
CHOLD = 25 pF
VSS
Legend: CPIN
VT
ILEAKAGE
RIC
SS
CHOLD
RSS
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
various junctions
= Interconnect Resistance
= Sampling Switch
= Sample/Hold Capacitance (from DAC)
= Sampling Switch Resistance
6V
5V
VDD 4V
3V
2V
1 23 4
Sampling Switch (kΩ)
© 2007 Microchip Technology Inc.
Preliminary
DS39689E-page 231