PIC18F4321 Datasheet, PDF (15/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F4321 FAMILY
TABLE 1-2: PIC18F2221/2321 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
SPDIP,
Pin Buffer
SOIC, QFN ^{Type Type}
SSOP
Description
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
2
27
I/O TTL Digital I/O.
I Analog Analog input 0.
RA1/AN1
RA1
AN1
3
28
I/O TTL Digital I/O.
I Analog Analog input 1.
RA2/AN2/VREF-/CVREF 4
RA2
AN2
VREF-
CVREF
1
I/O TTL Digital I/O.
I Analog Analog input 2.
I Analog A/D reference voltage (low) input.
O Analog Comparator reference voltage output.
RA3/AN3/VREF+
RA3
AN3
VREF+
5
2
I/O TTL Digital I/O.
I Analog Analog input 3.
I Analog A/D reference voltage (high) input.
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
6
3
I/O ST Digital I/O. Open-collector output.
I ST Timer0 external clock input.
O—
Comparator 1 output.
RA5/AN4/SS/HLVDIN/
7
4
C2OUT
RA5
I/O TTL Digital I/O.
AN4
I Analog Analog input 4.
SS
I TTL SPI slave select input.
HLVDIN
I Analog High/Low-Voltage Detect input.
C2OUT
O—
Comparator 2 output.
RA6
See the OSC2/CLKO/RA6 pin.
RA7
See the OSC1/CLKI/RA7 pin.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I²C = ST with I²C™ or SMB levels
CMOS = CMOS compatible input or output
I
= Input
P = Power
O = Output
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
© 2007 Microchip Technology Inc.
Preliminary
DS39689E-page 13