PIC18F4321 Datasheet, PDF (243/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F4321 FAMILY
20.9 Analog Input Connection
Considerations
A simplified circuit for an analog input is shown in
Figure 20-4. Since the analog pins are connected to a
digital output, they have reverse biased diodes to VDD
and VSS. The analog input, therefore, must be between
VSS and VDD. If the input voltage deviates from this
range by more than 0.6V in either direction, one of the
diodes is forward biased and a latch-up condition may
occur. A maximum source impedance of 10 kΩ is
recommended for the analog sources. Any external
component connected to an analog input pin, such as
a capacitor or a Zener diode, should have very little
leakage current.
FIGURE 20-4:
COMPARATOR ANALOG INPUT MODEL
VDD
RS < 10k
AIN
VA
CPIN
5 pF
VT = 0.6V
VT = 0.6V
RIC
ILEAKAGE
±500 nA
Comparator
Input
VSS
Legend:
CPIN
=
VT
=
ILEAKAGE =
RIC
=
RS
=
VA
=
Input Capacitance
Threshold Voltage
Leakage Current at the pin due to various junctions
Interconnect Resistance
Source Impedance
Analog Voltage
TABLE 20-1: REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
CMCON
C2OUT C1OUT C2INV C1INV
CIS
CM2
CM1
CM0
51
CVRCON CVREN CVROE CVRR CVRSS CVR3 CVR2 CVR1 CVR0
51
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
52
PIR2
OSCFIF CMIF
—
EEIF
BCLIF HLVDIF TMR3IF CCP2IF
52
PIE2
OSCFIE CMIE
—
EEIE BCLIE HLVDIE TMR3IE CCP2IE 52
IPR2
PORTA
LATA
TRISA
OSCFIP CMIP
—
EEIP BCLIP HLVDIP TMR3IP CCP2IP 52
RA7⁽¹⁾
RA6⁽¹⁾
RA5
RA4
RA3
RA2
RA1
RA0
52
LATA7⁽¹⁾ LATA6⁽¹⁾ PORTA Data Latch Register (Read and Write to Data Latch)
52
TRISA7⁽¹⁾ TRISA6⁽¹⁾ PORTA Data Direction Control Register
52
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module.
Note 1: PORTA<7:6> and their direction and latch bits are individually configured as port pins based on various
primary oscillator modes. When disabled, these bits read as ‘0’.
© 2007 Microchip Technology Inc.
Preliminary
DS39689E-page 241