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PIC18F4321 Datasheet, PDF (23/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
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PIC18F4321 FAMILY
TABLE 1-3: PIC18F4221/4321 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP Type Type
Description
PORTE is a bidirectional I/O port.
RE0/RD/AN5
RE0
RD
AN5
8 25 25
I/O ST
Digital I/O.
I TTL Read control for Parallel Slave Port
(see also WR and CS pins).
I Analog Analog input 5.
RE1/WR/AN6
RE1
WR
AN6
9 26 26
I/O ST
Digital I/O.
I TTL Write control for Parallel Slave Port
(see CS and RD pins).
I Analog Analog input 6.
RE2/CS/AN7
RE2
CS
AN7
10 27 27
I/O ST
Digital I/O.
I TTL Chip Select control for Parallel Slave Port
(see related RD and WR).
I Analog Analog input 7.
RE3
— — — — — See MCLR/VPP/RE3 pin.
VSS
12, 31 6, 30, 6, 29 P
— Ground reference for logic and I/O pins.
31
VDD
NC/ICCK/ICPGC
ICCK(3)
ICPGC(3)
NC/ICDT/ICPGD
ICDT(3)
ICPGD(3)
NC/ICRST/ICVPP
ICRST(3)
ICVPP(3)
NC/ICPORTS
ICPORTS(3)
11, 32 7, 8, 7, 28 P
— Positive supply for logic and I/O pins.
28, 29
— — 12
No Connect or dedicated ICD/ICSP™ port clock.(3)
I
ST
In-Circuit Debugger clock.
I
ST
ICSP™ programming clock.
— — 13
No Connect or dedicated ICD/ICSP port clock.(3)
I/O ST
In-Circuit Debugger data.
I/O ST
ICSP programming data.
— — 33
No Connect or dedicated ICD/ICSP port Reset.(3)
I
ST
Master Clear (Reset) input.
P Analog Programming voltage input.
—
—
34
P
ST No Connect or 28-pin device emulation.(3)
Enable 28-pin device emulation when connected
to VSS.
NC
— 13 12,13, — — No Connect.
33, 34
Legend:
Note 1:
2:
3:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I2C = ST with I2C™ or SMB levels
CMOS = CMOS compatible input or output
I
= Input
P = Power
O = Output
Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
Special ICPORT features available in select circumstances. See Section 23.9 “Special ICPORT Features
(44-Pin TQFP Packages Only)” for more information.
© 2007 Microchip Technology Inc.
Preliminary
DS39689E-page 21
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