PIC18F4321 Datasheet, PDF (33/396 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F4321 FAMILY
REGISTER 2-2:
OSCCON: OSCILLATOR CONTROL REGISTER
R/W-0
IDLEN
R/W-1 R/W-0 R/W-0
IRCF2⁽⁵⁾ IRCF1⁽⁵⁾ IRCF0⁽⁵⁾
R⁽¹⁾
OSTS
bit 7
R-0
IOFS
R/W-0
SCS1⁽⁴⁾
R/W-0
SCS0⁽⁴⁾
bit 0
bit 7
bit 6-4
bit 3
bit 2
bit 1-0
IDLEN: Idle Enable bit
1 = Device enters an Idle mode when a SLEEP instruction is executed
0 = Device enters Sleep mode when a SLEEP instruction is executed
IRCF2:IRCF0: Internal Oscillator Frequency Select bits⁽⁵⁾
111 = 8 MHz (INTOSC drives clock directly)
110 = 4 MHz
101 = 2 MHz
100 = 1 MHz⁽³⁾
011 = 500 kHz
010 = 250 kHz
001 = 125 kHz
000 = 31 kHz (from either INTOSC/256 or INTRC directly)⁽²⁾
OSTS: Oscillator Start-up Time-out Status bit⁽¹⁾
1 = Oscillator Start-up Timer (OST) time-out has expired; primary oscillator is running
0 = Oscillator Start-up Timer (OST) time-out is running; primary oscillator is not ready
IOFS: INTOSC Frequency Stable bit
1 = INTOSC frequency is stable
0 = INTOSC frequency is not stable
SCS1:SCS0: System Clock Select bits⁽⁴⁾
1x = Internal oscillator block
01 = Secondary (Timer1) oscillator
00 = Primary oscillator
Note 1: Reset state depends on state of the IESO Configuration bit.
2: Source selected by the INTSRC bit (OSCTUNE<7>), see text.
3: Default output frequency of INTOSC on Reset.
4: Modifying the SCSI:SCSO bits will cause an immediate clock source switch.
5: Modifying the IRCF3:IRCF0 bits will cause an immediate clock frequency switch if
the internal oscillator is providing the device clocks.
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
© 2007 Microchip Technology Inc.
Preliminary
DS39689E-page 31