PIC18F-LF1XK50 Datasheet, PDF(285/420 Page) Microchip Technology – 20-Pin USB Flash Microcontrollers

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PIC18F-LF1XK50 Datasheet, PDF (285/420 Pages) Microchip Technology – 20-Pin USB Flash Microcontrollers

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PIC18F/LF1XK50

TABLE 23-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS

Register

TOSU

TOSH

TOSL

STKPTR

PCLATU

Address

FFFh

FFEh

FFDh

FFCh

FFBh

Power-on Reset,

Brown-out Reset

---0 0000

0000 0000

0000 0000

00-0 0000

---0 0000

MCLR Resets,

WDT Reset,

RESET Instruction,

Stack Resets

---0 0000

0000 0000

0000 0000

uu-0 0000

---0 0000

Wake-up via WDT

or Interrupt

---0 uuuu(3)

uuuu uuuu(3)

uuuu uuuu(3)

uu-u uuuu(3)

---u uuuu

PCLATH

PCL

TBLPTRU

TBLPTRH

FFAh

FF9h

FF8h

FF7h

0000 0000

0000 0000

---0 0000

0000 0000

0000 0000

0000 0000

---0 0000

0000 0000

uuuu uuuu

PC + 2(2)

---u uuuu

uuuu uuuu

TBLPTRL

FF6h

0000 0000

0000 0000

uuuu uuuu

TABLAT

PRODH

PRODL

INTCON

INTCON2

INTCON3

FF5h

FF4h

FF3h

FF2h

FF1h

FF0h

0000 0000

xxxx xxxx

xxxx xxxx

0000 000x

1111 -1-1

11-0 0-00

0000 0000

uuuu uuuu

uuuu uuuu

0000 000u

1111 -1-1

11-0 0-00

uuuu uuuu

uuuu uuuu

uuuu uuuu

uuuu uuuu(1)

uuuu -u-u(1)

uu-u u-uu(1)

INDF0

FEFh

N/A

N/A

N/A

POSTINC0

FEEh

N/A

N/A

N/A

POSTDEC0

FEDh

N/A

N/A

N/A

PREINC0

FECh

N/A

N/A

N/A

PLUSW0

FEBh

N/A

N/A

N/A

FSR0H

FSR0L

WREG

FEAh

FE9h

FE8h

---- 0000

xxxx xxxx

xxxx xxxx

---- 0000

uuuu uuuu

uuuu uuuu

---- uuuu

uuuu uuuu

uuuu uuuu

INDF1

FE7h

N/A

N/A

N/A

POSTINC1

FE6h

N/A

N/A

N/A

POSTDEC1

FE5h

N/A

N/A

N/A

PREINC1

FE4h

N/A

N/A

N/A

PLUSW1

FE3h

N/A

N/A

N/A

Legend:

Note 1:

2:

3:

4:

5:

u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hard-

ware stack.

See Table 23-3 for Reset value for specific condition.

All bits of the ANSELH register initialize to â0â if the PBADEN bit of CONFIG3H is â0â.

ï£ 2010 Microchip Technology Inc.

Preliminary

DS41350E-page 285

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