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PIC18F-LF1XK50 Datasheet, PDF (19/420 Pages) Microchip Technology – 20-Pin USB Flash Microcontrollers
2.5 Internal Oscillator
The internal oscillator module contains two independent
oscillators which are:
• LFINTOSC: Low-Frequency Internal Oscillator
• HFINTOSC: High-Frequency Internal Oscillator
When operating with either oscillator, OSC1 will be an
I/O and OSC2 will be either an I/O or CLKOUT. The
CLKOUT function is selected by the FOSC bits of the
CONFIG1H Configuration register. When OSC2 is
configured as CLKOUT, the frequency at the pin is the
frequency of the Internal Oscillator divided by 4.
2.5.1 LFINTOSC
The Low-Frequency Internal Oscillator (LFINTOSC) is
a 31 kHz internal clock source. The LFINTOSC
oscillator is the clock source for:
• Power-up Timer
• Watchdog Timer
• Fail-Safe Clock Monitor
The LFINTOSC is enabled when any of the following
conditions are true:
• Power-up Timer is enabled (PWRTEN = 0)
• Watchdog Timer is enabled (WDTEN = 1)
• Watchdog Timer is enabled by software
(WDTEN = 0 and SWDTEN = 1)
• Fail-Safe Clock Monitor is enabled (FCMEM = 1)
• SCS1 = 1 and IRCF<2:0> = 000 and INTSRC = 0
• FOSC<3:0> selects the internal oscillator as the
primary clock and IRCF<2:0> = 000 and
INTSRC = 0
• IESO = 1 (Two-Speed Start-up) and
IRCF<2:0> = 000 and INTSRC = 0
2.5.2 HFINTOSC
The High-Frequency Internal Oscillator (HFINTOSC) is
a precision oscillator that is factory-calibrated to
operate at 16 MHz. The output of the HFINTOSC
connects to a postscaler and a multiplexer (see
Figure 2-1). One of eight frequencies can be selected
using the IRCF<2:0> bits of the OSCCON register. The
following frequencies are available from the
HFINTOSC:
• 16 MHZ
• 8 MHZ
• 4 MHZ
• 2 MHZ
• 1 MHZ (Default after Reset)
• 500 kHz
• 250 kHz
• 31 kHz
PIC18F/LF1XK50
The HFIOFS bit of the OSCCON register indicates
whether the HFINTOSC is stable.
Note 1: Selecting 31 kHz from the HFINTOSC
oscillator requires IRCF<2:0> = 000 and
the INTSRC bit of the OSCTUNE register
to be set. If the INTSRC bit is clear, the
system clock will come from the
LFINTOSC.
2: Additional adjustments to the frequency
of the HFINTOSC can made via the
OSCTUNE registers. See Register 2-3
for more details
The HFINTOSC is enabled if any of the following
conditions are true:
• SCS1 = 1 and IRCF<2:0>  000
• SCS1 = 1 and IRCF<2:0> = 000 and INTSRC = 1
• FOSC<3:0> selects the internal oscillator as the
primary clock and
- IRCF<2:0>  000 or
- IRCF<2:0> = 000 and INTSRC = 1
• IESO = 1 (Two-Speed Start-up) and
- IRCF<2:0>  000 or
- IRCF<2:0> = 000 and INTSRC = 1
• FCMEM = 1 (Fail Safe Clock Monitoring) and
- IRCF<2:0>  000 or
- IRCF<2:0> = 000 and INTSRC = 1
 2010 Microchip Technology Inc.
Preliminary
DS41350E-page 19