PIC18F-LF1XK50 Datasheet, PDF (116/420 Pages) Microchip Technology – 20-Pin USB Flash Microcontrollers

PIC18F/LF1XK50
13.5 Resetting Timer3 Using the CCP
Special Event Trigger
If CCP1 module is configured to use Timer3 and to gen-
erate a Special Event Trigger in Compare mode
(CCP1M<3:0>), this signal will reset Timer3. It will also
start an A/D conversion if the A/D module is enabled
(see Section 17.2.8 “Special Event Trigger” for more
information).
The module must be configured as either a timer or
synchronous counter to take advantage of this feature.
When used this way, the CCPR1H:CCPR1L register
pair effectively becomes a period register for Timer3.
If Timer3 is running in Asynchronous Counter mode,
the Reset operation may not work.
In the event that a write to Timer3 coincides with a
Special Event Trigger from a CCP module, the write will
take precedence.
TABLE 13-1: REGISTERS ASSOCIATED WITH TIMER3 AS A TIMER/COUNTER
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RABIE TMR0IF INT0IF RABIF
285
PIR2
OSCFIF C1IF
C2IF
EEIF
BCLIF USBIF TMR3IF CCP2IF 288
PIE2
OSCFIE C1IE
C2IE
EEIE
BCLIE USBIE TMR3IE CCP2IE
288
IPR2
OSCFIP C1IP
C2IP
EEIP
BCLIP USBIP TMR3IP CCP2IP
288
TMR3L Timer3 Register, Low Byte
287
TMR3H Timer3 Register, High Byte
287
T1CON
RD16 T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 286
T3CON
RD16
—
T3CKPS1 T3CKPS0 T3CCP1 T3SYNC TMR3CS TMR3ON 287
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 288
ANSELH
—
—
—
—
ANS11 ANS10 ANS9 ANS8
288
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer3 module.
DS41350E-page 116
Preliminary
 2010 Microchip Technology Inc.